SN74AHCT125-Q1

ACTIVE

Automotive 4-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

SN74AHCT125-Q1

ACTIVE

Product details

Technology family AHCT Number of channels 4 IOL (max) (mA) 8 Supply current (max) (µA) 20 IOH (max) (mA) -8 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Automotive Operating temperature range (°C) -40 to 125
Technology family AHCT Number of channels 4 IOL (max) (mA) 8 Supply current (max) (µA) 20 IOH (max) (mA) -8 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Automotive Operating temperature range (°C) -40 to 125
SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) WQFN (BQA) 14 7.5 mm² (3 mm × 2.5 mm)
  • Inputs are TTL-voltage compatible
  • Latch-up performance exceeds 250mA per JESD 17
  • Functional Safety Capable
    • Documentation available to aid safety system design
  • Inputs are TTL-voltage compatible
  • Latch-up performance exceeds 250mA per JESD 17
  • Functional Safety Capable
    • Documentation available to aid safety system design

The SN74AHCT125-Q1 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.

To establish the high-impedance state during power up or power down, tiedown the OE to VCC through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.

The SN74AHCT125-Q1 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.

To establish the high-impedance state during power up or power down, tiedown the OE to VCC through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74AHCT125-Q1 Automotive Quadruple Bus Buffer Gates With 3-State Outputs datasheet (Rev. D) PDF | HTML Sep 10, 2025
Functional safety information SN74AHCT125-Q1 Functional Safety FIT Rate and Failure Mode Distribution Dec 29, 2019
More literature Automotive Logic Devices Brochure Aug 27, 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Supported products & hardware
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Simulation model

SN74AHCT125 Behavioral SPICE Model

SCLM256.ZIP (7 KB) - PSpice model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian

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