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Product details

Parameters

Technology Family ALS VCC (Min) (V) 4.5 VCC (Max) (V) 5.5 Input type TTL Output type TTL open-in-new Find other Digital comparator

Package | Pins | Size

PDIP (N) 20 229 mm² 24.33 x 9.4 SOIC (DW) 20 132 mm² 12.8 x 10.3 SOP (NS) 20 98 mm² 12.6 x 7.8 open-in-new Find other Digital comparator

Features

  • Compare Two 8-Bit Words
  • Choice of Totem-Pole or Open-Collector Outputs
  • SN74ALS518 and ´ALS520 Have 20-k Pullup Resistors on Q Inputs
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

 

 

SN74ALS521 is identical to ´ALS688.

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Description

These identity comparators perform comparisons on two 8-bit binary or BCD words. The SN74ALS518 provides P = Q outputs, while the ´ALS520 and SN74ALS521 provide P = Q\ outputs. The SN74ALS518 has an open-collector output. The SN74ALS518 and ´ALS520 feature 20-k pullup resistors on the Q inputs for analog or switch data.

The SN54ALS520 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS518, SN74ALS520, and SN74ALS521 are characterized for operation from 0°C to 70°C.

 

 

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet 8-Bit Identity Comparators datasheet (Rev. B) Nov. 01, 1995
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application notes Designing With Logic (Rev. C) Jun. 01, 1997
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
Application notes Advanced Schottky (ALS and AS) Logic Families Aug. 01, 1995

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

CAD/CAE symbols

Package Pins Download
PDIP (N) 20 View options
SO (NS) 20 View options
SOIC (DW) 20 View options

Ordering & quality

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