SN74ALVCH162830

ACTIVE

18-ch, 1.65-V to 3.6-V buffers with bus-hold and 3-state outputs

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18-ch, 1.65-V to 3.6-V buffers with bus-hold and 3-state outputs

SN74ALVCH162830

ACTIVE

Product details

Parameters

Technology Family ALVC Supply voltage (Min) (V) 1.65 Supply voltage (Max) (V) 3.6 Number of channels (#) 18 IOL (Max) (mA) 12 ICC (Max) (uA) 40 IOH (Max) (mA) -12 Input type Standard CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns), Over-voltage tolerant inputs, Damping resistors, Bus-hold Rating Catalog open-in-new Find other Non-Inverting buffer/driver

Package | Pins | Size

TSSOP (DBB) 80 138 mm² 17 x 8.1 open-in-new Find other Non-Inverting buffer/driver

Features

  • Member of the Texas Instruments Widebus™ Family
  • Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.

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Description

This 1-bit to 2-bit address driver is designed for 1.65-V to 3.6-V VCC operation.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Technical documentation

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Type Title Date
* Data sheet SN74ALVCH162830 datasheet (Rev. I) Jul. 27, 2004
Application note An Overview of Bus-Hold Circuit and the Applications (Rev. B) Sep. 17, 2018
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
User guide ALVC Advanced Low-Voltage CMOS Including SSTL, HSTL, And ALB (Rev. B) Aug. 01, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) May 22, 2002
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) Sep. 08, 1999
Application note TI SN74ALVC16835 Component Specification Analysis for PC100 Aug. 03, 1998
Application note Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A) May 13, 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices Dec. 01, 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
Application note Understanding Advanced Bus-Interface Products Design Guide May 01, 1996

Design & development

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Design tools & simulation

SIMULATION MODEL Download
SCEM072A.ZIP (11 KB) - IBIS Model
SIMULATION MODEL Download
SCEM754.ZIP (7 KB) - PSpice Model

CAD/CAE symbols

Package Pins Download
TSSOP (DBB) 80 View options

Ordering & quality

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