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SN74ALVCH16825

ACTIVE

18-ch, 1.65-V to 3.6-V buffers with bus-hold and 3-state outputs

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Data sheet

SN74ALVCH16825

ACTIVE
Data sheet Order now

Product details

Technology family ALVC Number of channels 18 IOL (max) (mA) 24 Supply current (max) (µA) 40 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family ALVC Number of channels 18 IOL (max) (mA) 24 Supply current (max) (µA) 40 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DL) 56 190.647 mm² (18.42 mm × 10.35 mm) TSSOP (DGG) 56 113.4 mm² (14 mm × 8.1 mm)
  • Member of the Texas Instruments Widebus™ Family
  • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

Widebus, EPIC are trademarks of Texas Instruments.
  • Member of the Texas Instruments Widebus™ Family
  • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

Widebus, EPIC are trademarks of Texas Instruments.

This 18-bit buffer and line driver is designed for 1.65-V to 3.6-V VCC operation.

This SN74ALVCH16825 improves the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as two 9-bit buffers or one 18-bit buffer. It provides true data.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all nine affected outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.

The SN74ALVCH16825 is characterized for operation from &$150;40°C to 85°C.

This 18-bit buffer and line driver is designed for 1.65-V to 3.6-V VCC operation.

This SN74ALVCH16825 improves the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as two 9-bit buffers or one 18-bit buffer. It provides true data.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all nine affected outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.

The SN74ALVCH16825 is characterized for operation from &$150;40°C to 85°C.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74ALVCH16825 datasheet (Rev. D) Sep 2, 2004
Application note An Overview of Bus-Hold Circuit and the Applications (Rev. B) Sep 17, 2018

Design & development

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Simulation model

SN74ALVCH16825 Behavioral SPICE Model

SCEM753.ZIP (7 KB) - PSpice model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
SSOP (DL) 56 Ultra Librarian
TSSOP (DGG) 56 Ultra Librarian
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