These devices contain three independent 3-input positive-AND gates. They perform the Boolean functions Y = A • B • C or Y = (A\ + B\ + C\)\ in positive logic.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | SN54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 datasheet (Rev. D) | 08 Nov 2002 | |
| Selection guide | Logic Guide (Rev. AB) | 12 Jun 2017 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 Dec 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 Jan 2007 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 Jul 2004 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 29 Aug 2002 | ||
| Application note | Designing With Logic (Rev. C) | 01 Jun 1997 | ||
| Application note | Advanced Schottky Load Management | 01 Feb 1997 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 01 Oct 1996 | ||
| Application note | Live Insertion | 01 Oct 1996 | ||
| Application note | Advanced Schottky (ALS and AS) Logic Families | 01 Aug 1995 |
For additional terms or required resources, click any title below to view the detail page where available.
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.
| Package | Pins | Download |
|---|---|---|
| PDIP (N) | 14 | View options |
| SOIC (D) | 14 | View options |
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