Automotive dual-bit dual-supply bus transceiver with configurable voltage translation

SN74AXC2T45-Q1

ACTIVE

Product details

Technology Family AXC Applications GPIO, 4-wire UART Bits (#) 2 High input voltage (Min) (Vih) 0.55 High input voltage (Max) (Vih) 3.6 Vout (Min) (V) 0.65 Vout (Max) (V) 3.6 IOH (Max) (mA) -12 IOL (Max) (mA) 12 Rating Automotive
Technology Family AXC Applications GPIO, 4-wire UART Bits (#) 2 High input voltage (Min) (Vih) 0.55 High input voltage (Max) (Vih) 3.6 Vout (Min) (V) 0.65 Vout (Max) (V) 3.6 IOH (Max) (mA) -12 IOL (Max) (mA) 12 Rating Automotive
VSSOP (DCU) 8 6 mm² 2 x 3.1
  • AEC-Q100 automotive qualified
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Operating temperature from –40°C to +125°C
  • Glitch-free power supply sequencing
  • Up to 380 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
    • If either VCC input is below 100 mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model
    • 1000-V charged-device model
  • AEC-Q100 automotive qualified
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Operating temperature from –40°C to +125°C
  • Glitch-free power supply sequencing
  • Up to 380 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
    • If either VCC input is below 100 mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model
    • 1000-V charged-device model

The SN74AXC2T45-Q1 is a two-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXC2T45-Q1 is compatible with a single-supply system.

The SN74AXC2T45-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXC2T45-Q1 device is designed so the control pin (DIR) is referenced to VCCA.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

The SN74AXC2T45-Q1 is a two-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXC2T45-Q1 is compatible with a single-supply system.

The SN74AXC2T45-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXC2T45-Q1 device is designed so the control pin (DIR) is referenced to VCCA.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

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SN74AXC2T45 ACTIVE Dual-bit dual-supply bus transceiver with configurable voltage translation Non-automotive qualified version

Technical documentation

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Type Title Date
* Data sheet SN74AXC2T45-Q1 2-Bit Translating Transceiver with Configurable Level-Shifting datasheet (Rev. A) 15 Sep 2021
Application note Translate Voltages for GPIO 04 Aug 2020

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Evaluation board

AVCLVCDIRCNTRL-EVM — Generic EVM for Direction-Controlled Bidirectional Translation Device Supporting AVC and LVC

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC is (...)

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