The ’HC4040 devices are 12-stage asynchronous binary counters, with the outputs of all stages available externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | SNx4HC4040 12-Bit Asynchronous Binary Counters datasheet (Rev. E) | PDF | HTML | Dec 1, 1982 |
| Application brief | Using Linear Interpolation to Estimate Specification Values | PDF | HTML | Apr 13, 2026 | |
| Application note | HCMOS Design Considerations (Rev. A) | Sep 9, 2002 |
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The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| PDIP (N) | 16 | Ultra Librarian |
| TSSOP (PW) | 16 | Ultra Librarian |
| SOP (NS) | 16 | Ultra Librarian |
| SOIC (D) | 16 | Ultra Librarian |
| SSOP (DB) | 16 | Ultra Librarian |
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