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Product details

Parameters

Technology Family HC VCC (Min) (V) 2 VCC (Max) (V) 6 Bits (#) 8 Voltage (Nom) (V) 6 F @ nom voltage (Max) (MHz) 70 ICC @ nom voltage (Max) (mA) 1.1 tpd @ nom Voltage (Max) (ns) 58 IOL (Max) (mA) 5.2 IOH (Max) (mA) -5.2 Operating temperature range (C) -40 to 85 open-in-new Find other Digital comparator

Package | Pins | Size

PDIP (N) 20 229 mm² 24.33 x 9.4 SOIC (DW) 20 132 mm² 12.8 x 10.3 open-in-new Find other Digital comparator

Features

  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current Outputs Drive Up To 10 LSTTL Loads
  • Typical tpd = 22 ns
  • ±4-mA Output Drive at 5 V
  • Compare Two 8-Bit Words
  • 100-k Pullup Resistors Are on the Q Inputs

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Description

These magnitude comparators perform comparisons of two 8-bit binary or BCD words. The ’HC682 devices feature 100-k pullup termination resistors on the Q inputs for analog or switch data.

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Technical documentation

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Type Title Date
* Datasheet SN54HC682, SN74HC682 datasheet (Rev. D) Mar. 18, 2003
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
Solution guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guides Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application notes Designing With Logic (Rev. C) Jun. 01, 1997
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
Application notes SN54/74HCT CMOS Logic Family Applications and Restrictions May 01, 1996
Application notes Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc Apr. 01, 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$10.00
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

CAD/CAE symbols

Package Pins Download
PDIP (N) 20 View options
SOIC (DW) 20 View options

Ordering & quality

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Videos

Anatomy of a logic part number

Logic part numbers use a formulaic naming system to denote the device's functionality and features. This video reviews the components to a logic part's name.

Posted: 22-Jan-2018
Duration: 01:26

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