Product details

Number of channels (#) 2 Technology Family HC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Input type Standard CMOS Output type Push-Pull Clock Frequency (Max) (MHz) 29 IOL (Max) (mA) 5.2 IOH (Max) (mA) -5.2 ICC (Max) (uA) 40 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode
Number of channels (#) 2 Technology Family HC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Input type Standard CMOS Output type Push-Pull Clock Frequency (Max) (MHz) 29 IOL (Max) (mA) 5.2 IOH (Max) (mA) -5.2 ICC (Max) (uA) 40 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode
SOIC (D) 14 52 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1:
      –40°C to +125°C, TA
  • Buffered inputs
  • Positive and negative input clamp diodes
  • Wide operating voltage range: 2 V to 6 V
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1:
      –40°C to +125°C, TA
  • Buffered inputs
  • Positive and negative input clamp diodes
  • Wide operating voltage range: 2 V to 6 V
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs

The SN74HC74-Q1 devices contain two independent D-type positive-edge-triggered flip-flops with asynchronous preset and clear pins for each.

The SN74HC74-Q1 devices contain two independent D-type positive-edge-triggered flip-flops with asynchronous preset and clear pins for each.

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Technical documentation

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Type Title Date
* Data sheet SN74HC74-Q1 Automotive Qualified Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset datasheet (Rev. B) 14 Apr 2020
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
Application note Power-Up Behavior of Clocked Devices (Rev. A) 06 Feb 2015
More literature Automotive Logic Devices Brochure 27 Aug 2014
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

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Reference designs

TIDA-01372 — Automotive LED Front Lamp with Sequential Turn Animation Reference Design

This reference design is analog solution for automotive front lamp with sequential turn animation with the SEPIC topology, and this design also realizes full automotive diagnostic with low quiescent current during fault mode.
Package Pins Download
SOIC (D) 14 View options
TSSOP (PW) 14 View options

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