SN74HCS86-Q1

ACTIVE

Automotive 4-ch, 2-input, 2-V to 6-V low power XOR (exclusive OR) gates with Schmitt-Trigger inputs

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Automotive 4-ch, 2-input, 2-V to 6-V low power XOR (exclusive OR) gates with Schmitt-Trigger inputs

SN74HCS86-Q1

ACTIVE

Product details

Parameters

Technology Family HCS Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Number of channels (#) 4 Inputs per channel 2 IOL (Max) (mA) 7.8 Input type Schmitt-Trigger IOH (Max) (mA) -7.8 Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (Max) (Mbps) 130 Rating Automotive Operating temperature range (C) -40 to 125 open-in-new Find other XOR (exclusive OR) gates

Package | Pins | Size

SOIC (D) 14 52 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 WQFN (BQA) 14 open-in-new Find other XOR (exclusive OR) gates

Features

  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
open-in-new Find other XOR (exclusive OR) gates

Description

This device contains four independent 2-input XOR Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ⊕ B in positive logic.

open-in-new Find other XOR (exclusive OR) gates
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SN74HCS86 ACTIVE Quadruple 2-input XOR gates with Schmitt-trigger inputs Exact equivalent device in commercial grade

Technical documentation

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Type Title Date
* Data sheet SN74HCS86-Q1 Automotive Quadruple 2-Input XOR Gates with Schmitt-Trigger Inputs datasheet (Rev. C) Mar. 22, 2021

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARD Download
document-generic User guide
20
Description
Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic and translation devices with included dual supply support
  • Board has 9 sections that can be broken apart for a smaller form factor

Design tools & simulation

SIMULATION MODEL Download
SCLM124A.ZIP (51 KB) - IBIS Model
SIMULATION MODEL Download
SCLM140.ZIP (7 KB) - PSpice Model

CAD/CAE symbols

Package Pins Download
SOIC (D) 14 View options
TSSOP (PW) 14 View options
WQFN (BQA) 14 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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