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SN74HCT32

ACTIVE

4-ch 2-input 4.5-V to 5.5-V OR gate with TTL-compatible inputs

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Data sheet

SN74HCT32

ACTIVE
Data sheet Order now

Product details

Technology family HCT Number of channels 4 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type TTL-Compatible CMOS Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (max) (Mbps) 25 Rating Catalog Operating temperature range (°C) -40 to 85
Technology family HCT Number of channels 4 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type TTL-Compatible CMOS Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (max) (Mbps) 25 Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm) SSOP (DB) 14 48.36 mm² (6.2 mm × 7.8 mm)
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SN74ACT32 ACTIVE 4-ch, 2-input, 4.5-V to 5.5-V 24-mA drive strength OR gate with TTL-compatible inputs Voltage range 4.5V to 5.5V, average propagation delay 8ns, average drive strength 24mA

Technical documentation

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* Data sheet SNx4HCT32 Quadruple 2-Input Positive-OR Gates datasheet (Rev. G) PDF | HTML Oct 20, 2022

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Simulation model

SN74HCT32 Behavioral SPICE Model

SCLM198.ZIP (7 KB) - PSpice model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
PDIP (N) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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