SN74LV86A-Q1

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Automotive Catalog Quadruple 2-Input Exclusive-OR Gates

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Automotive Catalog Quadruple 2-Input Exclusive-OR Gates

SN74LV86A-Q1

ACTIVE

Product details

Parameters

Technology Family LV-A VCC (Min) (V) 2 VCC (Max) (V) 5.5 Channels (#) 4 Inputs per channel 2 IOL (Max) (mA) 12 Input type Standard CMOS IOH (Max) (mA) -12 Output type Push-Pull Features Partial Power Down (Ioff), Over-Voltage Tolerant Inputs, Very High Speed (tpd 5-10ns) Data rate (Max) (Mbps) 70 Rating Automotive Operating temperature range (C) -40 to 105 open-in-new Find other XOR (exclusive OR) gate

Package | Pins | Size

TSSOP (PW) 14 32 mm² 5 x 6.4 open-in-new Find other XOR (exclusive OR) gate

Features

  • Qualified for Automotive Applications
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • 2 V to 5.5-V VCC Operation
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    >2.3 V at VCC = 3.3 V, TA = 25°C
  • Supports Mixed-Mode Signal Operation on All Ports

open-in-new Find other XOR (exclusive OR) gate

Description

The SN74LV86A is a quadruple 2-input exclusive-OR gate designed for 2-V to 5.5-V VCC operation.

This device contains four independent 2-input exclusive-OR gates. It performs the Boolean function
Y = A B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

open-in-new Find other XOR (exclusive OR) gate
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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 3
Type Title Date
* Datasheet Quadruple 2-Input Exclusive-OR Gate datasheet (Rev. C) Apr. 15, 2008
Technical articles How to keep your motor running safely Jun. 04, 2020
More literature Automotive Logic Devices Brochure Aug. 27, 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

Design tools & simulation

SIMULATION MODELS Download
SCLM176.ZIP (7 KB) - PSpice Model

CAD/CAE symbols

Package Pins Download
TSSOP (PW) 14 View options

Ordering & quality

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