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SN74LV8T240-EP

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Enhanced product 8-bit inverting fixed-direction level translator with 3-state outputs

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Data sheet

SN74LV8T240-EP

ACTIVE
Data sheet Order now

Product details

Technology family LVT Bits (#) 8 Data rate (max) (bps) 150000000 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 0 IOH (max) (A) -0.024 IOL (max) (A) 0.024 Supply current (max) (A) 0.00002 Features Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Operating temperature range (°C) -55 to 125 Applications GPIO, SPI Rating HiRel Enhanced Product
Technology family LVT Bits (#) 8 Data rate (max) (bps) 150000000 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 0 IOH (max) (A) -0.024 IOL (max) (A) 0.024 Supply current (max) (A) 0.00002 Features Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Operating temperature range (°C) -55 to 125 Applications GPIO, SPI Rating HiRel Enhanced Product
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Wide operating range of 1.65V to 5.5V
  • 5.5V tolerant input pins
  • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):
    • Up translation:
      • 1.2V to 1.8V
      • 1.5V to 2.5V
      • 1.8V to 3.3V
      • 3.3V to 5.0V

    • Down translation:

      • 5.0V, 3.3V, 2.5V to 1.8V
      • 5.0V, 3.3V to 2.5V
      • 5.0V to 3.3V
  • Up to 150Mbps with 5V or 3.3V VCC
  • Supports standard function pinout
  • Latch-up performance exceeds 250mAper JESD 17
  • Supports defense and aerospace applications:
    • Controlled baseline
    • One assembly and test site
    • One fabrication site
    • Extended product life cycle
    • Product traceability
  • Wide operating range of 1.65V to 5.5V
  • 5.5V tolerant input pins
  • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):
    • Up translation:
      • 1.2V to 1.8V
      • 1.5V to 2.5V
      • 1.8V to 3.3V
      • 3.3V to 5.0V

    • Down translation:

      • 5.0V, 3.3V, 2.5V to 1.8V
      • 5.0V, 3.3V to 2.5V
      • 5.0V to 3.3V
  • Up to 150Mbps with 5V or 3.3V VCC
  • Supports standard function pinout
  • Latch-up performance exceeds 250mAper JESD 17
  • Supports defense and aerospace applications:
    • Controlled baseline
    • One assembly and test site
    • One fabrication site
    • Extended product life cycle
    • Product traceability

The SN74LV8T240-EP device contains eight independent inverting line drivers with 3-state outputs. Each channel performs the Boolean function Y = A in positive logic. The channels are grouped in sets of four, with one OE pin controlling each set. The outputs can be put into a hi-Z state by applying a high on the associated OE pin.

The SN74LV8T240-EP device contains eight independent inverting line drivers with 3-state outputs. Each channel performs the Boolean function Y = A in positive logic. The channels are grouped in sets of four, with one OE pin controlling each set. The outputs can be put into a hi-Z state by applying a high on the associated OE pin.
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Technical documentation

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Type Title Date
* Data sheet SN74LV8T240-EP Enhanced Product, Octal Inverting Buffers/Drivers with 3-State Outputs datasheet PDF | HTML 29 Jan 2025
* Radiation & reliability report SN74LV8T240-EP Enhanced Product Qualification and Reliability Report PDF | HTML 24 Feb 2025

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 20 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

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Information included:
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