Operate From 1.65 V to 3.6 V
Specified From –40°C to 85°C,
–40°C to 125°C, and –55°C to 125°C
Inputs Accept Voltages to 5.5 V
Max t_pd of 5.2 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
> 2 V at V_CC = 3.3 V, T_A = 25°C
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

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Description

These quadruple 2-line to 1-line data selectors/multiplexers are designed for 1.65-V to 3.6-V V_CC operation.

The ’LVC157A devices feature a common strobe (G) input. When G is high, all outputs are low. When G is low, a 4-bit word is selected from one of two sources and is routed to the four outputs. The devices provide true data.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

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Technical documentation

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	Type	Title	Date
*	Datasheet	SN54LVC157A, SN74LVC157A datasheet (Rev. Q)	Jan. 01, 2011
	Selection guide	Little Logic Guide 2018 (Rev. G)	Jul. 06, 2018
	Selection guide	Logic Guide (Rev. AB)	Jun. 12, 2017
	Application note	How to Select Little Logic (Rev. A)	Jul. 26, 2016
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. D)	Jun. 23, 2016
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	Dec. 02, 2015
	User guide	LOGIC Pocket Data Book (Rev. B)	Jan. 16, 2007
	More literature	Design Summary for WCSP Little Logic (Rev. B)	Nov. 04, 2004
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	Jul. 08, 2004
	Application note	Selecting the Right Level Translation Solution (Rev. A)	Jun. 22, 2004
	User guide	Signal Switch Data Book (Rev. A)	Nov. 14, 2003
	Application note	Use of the CMOS Unbuffered Inverter in Oscillator Circuits	Nov. 06, 2003
	More literature	Logic Cross-Reference (Rev. A)	Oct. 07, 2003
	User guide	LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)	Dec. 18, 2002
	Application note	Texas Instruments Little Logic Application Report	Nov. 01, 2002
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	Aug. 29, 2002
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards	Jun. 13, 2002
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)	May 22, 2002
	Application note	Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices	May 10, 2002
	More literature	STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS	Mar. 27, 2002
	More literature	Military Low Voltage Solutions	Apr. 04, 2001
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices	Dec. 01, 1997
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)	Aug. 01, 1997
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)	Jun. 01, 1997
	Application note	LVC Characterization Information	Dec. 01, 1996
	Application note	Input and Output Characteristics of Digital Integrated Circuits	Oct. 01, 1996
	Application note	Live Insertion	Oct. 01, 1996
	User guide	Low-Voltage Logic (LVC) Designer's Guide	Sep. 01, 1996
	Application note	Understanding Advanced Bus-Interface Products Design Guide	May 01, 1996

Design & development

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Hardware development

EVALUATION BOARD Download

Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, P, N, and DGV Packages

14-24-LOGIC-EVM

document-generic

User guide

Description

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.

Features

Board design allows for versatility in evaluation
Supports a wide-range of logic devices

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EVALUATION BOARD Download

Generic 14 through 24 pin non-leaded package evaluation module

14-24-NL-LOGIC-EVM

document-generic

User guide

Description

Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.

Features

Board design allows for versatility in evaluation
Supports a wide-range of logic and translation devices with included dual supply support
Board has 9 sections that can be broken apart for a smaller form factor

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