Home Logic & voltage translation Specialty logic ICs Digital multiplexers & encoders
Home
Logic & voltage translation
Specialty logic ICs
Digital multiplexers & encoders

SN74LVC157A

ACTIVE

Quadruple 2-Line To1-Line Data Selector / Multiplexer

Order now
Data sheet

SN74LVC157A

ACTIVE
Data sheet Order now

Product details

Technology family LVC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -40 to 125 Rating Catalog
Technology family LVC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -40 to 125 Rating Catalog
SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 SSOP (DB) 16 48.36 mm² 6.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4 VQFN (RGY) 16 14 mm² 4 x 3.5
  • Operate From 1.65 V to 3.6 V
  • Specified From –40°C to 85°C,
    –40°C to 125°C, and –55°C to 125°C
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 5.2 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Operate From 1.65 V to 3.6 V
  • Specified From –40°C to 85°C,
    –40°C to 125°C, and –55°C to 125°C
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 5.2 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

These quadruple 2-line to 1-line data selectors/multiplexers are designed for 1.65-V to 3.6-V VCC operation.

The ’LVC157A devices feature a common strobe (G) input. When G is high, all outputs are low. When G is low, a 4-bit word is selected from one of two sources and is routed to the four outputs. The devices provide true data.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

These quadruple 2-line to 1-line data selectors/multiplexers are designed for 1.65-V to 3.6-V VCC operation.

The ’LVC157A devices feature a common strobe (G) input. When G is high, all outputs are low. When G is low, a 4-bit word is selected from one of two sources and is routed to the four outputs. The devices provide true data.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
open-in-new Find other Digital multiplexers & encoders
Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Drop-in replacement with upgraded functionality to the compared device
SN74AHC157 ACTIVE Quadruple 2-Line To 1-Line Data Selectors / Multiplexers Longer avg. propogation delay (12ns), lower avg. drive strength (9mA)

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 27
Type Title Date
* Data sheet SN54LVC157A, SN74LVC157A datasheet (Rev. Q) 01 Jan 2011
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits 06 Nov 2003
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 18 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 May 2002
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 10 May 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 27 Mar 2002
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note LVC Characterization Information 01 Dec 1996
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Design guide Low-Voltage Logic (LVC) Designer's Guide 01 Sep 1996
Application note Understanding Advanced Bus-Interface Products Design Guide 01 May 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

User guide: PDF | HTML
Not available on TI.com
Evaluation board

14-24-NL-LOGIC-EVM — Generic 14 through 24 pin non-leaded package evaluation module

Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74LVC157A IBIS Model (Rev. A)

SCEM197A.ZIP (35 KB) - IBIS Model
Download
Package Pins Download
SOIC (D) 16 View options
SOP (NS) 16 View options
SSOP (DB) 16 View options
TSSOP (PW) 16 View options
VQFN (RGY) 16 View options
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos