SN74LVT16245B

ACTIVE

3.3-V ABT 16-Bit Bus Transceivers With 3-State Outputs

Order now

Data sheet

document-pdfAcrobat 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS--SN74LVT16245B datasheet (Rev. E)

SN74LVT16245B

ACTIVE

Order now

Product details

Number of channels

16

IOL (max) (mA)

64

IOH (max) (mA)

-64

Input type

TTL/CMOS

Output type

LVTTL

Features

Balanced outputs

Technology family

LVT

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Number of channels

16

IOL (max) (mA)

64

IOH (max) (mA)

-64

Input type

TTL/CMOS

Output type

LVTTL

Features

Balanced outputs

Technology family

LVT

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SSOP (DL)

48

164.358 mm² (15.88 mm × 10.35 mm)

TVSOP (DGV)

48

62.08 mm² (9.7 mm × 6.4 mm)

TSSOP (DGG)

48

101.25 mm² (12.5 mm × 8.1 mm)

Member of the Texas Instruments Widebus™ Family
State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
Support Unregulated Battery Operation Down to 2.7 V
Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
I_off and Power-Up 3-State Support Hot Insertion
Distributed V_CC and GND Pins Minimize High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.

Member of the Texas Instruments Widebus™ Family
State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
Support Unregulated Battery Operation Down to 2.7 V
Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
I_off and Power-Up 3-State Support Hot Insertion
Distributed V_CC and GND Pins Minimize High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.

The 'LVT16245B devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess I_CC and I_CCZ.

When V_CC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

The 'LVT16245B devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess I_CC and I_CCZ.

When V_CC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

filter

Find other General-purpose transceivers

Download View video with transcript Video