Packaging information
| Package | Pins DSBGA (YCF) | 48 |
| Package qty | Carrier 3,000 | LARGE T&R |
Features for the TAS2573
- Powerful class-D amplifier
- 8.5W 1% THD+N (8Ω at 4.4V)
- 8.8W 1% THD+N (4Ω at 4.4V)
- 15V boost with 5.1A max current limit
- Best in class efficiency
- Upto 89% efficiency at system level for 8Ω load
- 19mW idle channel power in active mode
- 5.5mW idle channel power in Noise gate mode
- Integrated 1.8V Y-bridge and 33mV step class-H
- High performance audio channel
- 4.2µV A-wt. idle channel noise
- 114dB Dynamic Range
- -90dB THDN
- Low EMI performance with ERC and SSM
- < 1µs chip to chip group delay matching
- Advanced integrated features
- Speaker Protection and Advanced Battery Guard with integrated IV sense
- Audio tuning with EQ, DRC, DEQ
- Speaker Rattle Noise Suppression algorithm
- Signal detection high efficiency modes
- High accuracy voltage monitor & temp sensor
- Ease of use features
- 1cell, 2cell and 3cell Li-ion battery support
- Clock based power up/down
- Auto clock rate detection: 16kHz to 192kHz
- External 14V PVDD supply support
- MCLK free operation
- Thermal and over current protection
- Programmable drive strength IO buffers
- Power Supplies and user interface
- VBAT: 2.0V to 5.5V
- VDD: 1.65V to 1.95V
- IOVDD: 1.2V or 1.8V
- VBAT_SNS: 2.0V to 10.0V
- PVDD: 2.5V to 14V (Ext. PVDD mode)
- I2S/TDM: 8 channels
- I2C: 4 selectable addresses
- 48-Ball, 0.35mm Pitch, WCSP package
Description for the TAS2573
The TAS2573 is a digital input Class-D amplifier with an integrated Boost for higher power delivery in battery-operated systems. The device has integrated IV-Sense for real-time monitoring of the loudspeakers. An on-chip, low-latency DSP supports Texas Instruments SmartAmp speaker protection and audio tuning algorithms to enable high output SPL while keeping speakers in a safe operating region.
The device is optimized for delivering the best battery life with advanced efficiency optimization features like Class-H, Y-bridge and DSP algorithms. An advanced battery guard algorithm on the DSP manages peak output power delivery while avoiding any audio distortion when battery capacity is depleting. This algorithm is supported using a local battery voltage monitor ADC.
Up to four TAS2573 amps can share a common bus via I2S/TDM + I2C interfaces.