TLV320ADC3101-Q1

ACTIVE

Product details

Number of ADC channels 2 Analog inputs 6 Digital audio interface DSP, I2S, L, PCM, R, TDM Control interface I2C Sampling rate (Max) (kHz) 96 ADC SNR (Typ) (dB) 92 Rating Automotive
Number of ADC channels 2 Analog inputs 6 Digital audio interface DSP, I2S, L, PCM, R, TDM Control interface I2C Sampling rate (Max) (kHz) 96 ADC SNR (Typ) (dB) 92 Rating Automotive
VQFN (RGE) 24 16 mm² 4 x 4
  • Qualified for Automotive Applications
  • AEC-Q100 Test Guidance With the Following Results:
    • Device Temperature Grade 2: –40°C to +105°C
      Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H1C
    • Device CDM ESD Classification Level C3B
  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to 96 kHz
  • Instruction-Programmable Embedded miniDSP
  • Flexible Digital Filtering With RAM Programmable Coefficient,
    Instructions, and Built-In Processing Blocks
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Additional Programmable IIR Filters for EQ, Noise Cancellation or Reduction
    • Up to 128 Programmable ADC Digital Filter Coefficients
  • Six Audio Inputs With Configurable Automatic Gain Control (AGC)
    • Programmable in Single-Ended or Fully Differential Configurations
    • Can Be 3-Stated for Easy Interoperability With Other Audio ICs
  • Low Power Consumption and Extensive Modular Power Control:
    • 6-mW Mono Record, 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Dual Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S,
    Left/Right-Justified, DSP, PCM, and TDM Modes
  • Digital Microphone Input Support
  • Two GPIOs
  • Power Supplies:
    • Analog: 2.6 V–3.6 V
    • Digital: Core: 1.65 V–1.95 V,
      I/O: 1.1 V–3.6 V
  • 4-mm × 4-mm 24-Pin RGE (QFN)
  • Qualified for Automotive Applications
  • AEC-Q100 Test Guidance With the Following Results:
    • Device Temperature Grade 2: –40°C to +105°C
      Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H1C
    • Device CDM ESD Classification Level C3B
  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to 96 kHz
  • Instruction-Programmable Embedded miniDSP
  • Flexible Digital Filtering With RAM Programmable Coefficient,
    Instructions, and Built-In Processing Blocks
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Additional Programmable IIR Filters for EQ, Noise Cancellation or Reduction
    • Up to 128 Programmable ADC Digital Filter Coefficients
  • Six Audio Inputs With Configurable Automatic Gain Control (AGC)
    • Programmable in Single-Ended or Fully Differential Configurations
    • Can Be 3-Stated for Easy Interoperability With Other Audio ICs
  • Low Power Consumption and Extensive Modular Power Control:
    • 6-mW Mono Record, 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Dual Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S,
    Left/Right-Justified, DSP, PCM, and TDM Modes
  • Digital Microphone Input Support
  • Two GPIOs
  • Power Supplies:
    • Analog: 2.6 V–3.6 V
    • Digital: Core: 1.65 V–1.95 V,
      I/O: 1.1 V–3.6 V
  • 4-mm × 4-mm 24-Pin RGE (QFN)

The TLV320ADC3101-Q1 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101-Q1 ideal for battery-powered portable equipment.

The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

The TLV320ADC3101-Q1 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101-Q1 ideal for battery-powered portable equipment.

The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

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* Data sheet Low-Power Stereo ADC With Embedded miniDSP for Wireless Handsets datasheet (Rev. B) 28 Sep 2012

Design & development

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Evaluation board

TLV320ADC3101EVM-K — TLV320ADC3101 evaluation module and USB motherboard

The TLV320ADC3101EVM is in the Texas Instruments (TI) modular EVM form factor, which allows direct evaluation of the device performance and operating characteristics and eases software development and system prototyping. The TLV320ADC3101EVM-K is a complete evaluation/demonstration kit, which (...)

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Simulation model

TLV320ADC3101 IBIS Model

SLAM171.ZIP (144 KB) - IBIS Model
Simulation tool

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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