Product details


Number of supplies monitored 1 Threshold voltage 1 (Typ) (V) Adjustable, 0.8, 0.9, 2.8, 2.9, 4.3 Features Manual reset, Reset time delay Reset threshold accuracy (%) 1 Output driver type/reset output Active-low, Open-drain, Push-pull Time delay (ms) Programmable, 0 Rating Catalog Watchdog timer WDI (sec) None Operating temperature range (C) -40 to 125 open-in-new Find other Supervisor & reset ICs

Package | Pins | Size

SOT-23 (DBV) 5 SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 open-in-new Find other Supervisor & reset ICs


  • Operating voltage range : 0.7 V to 6 V
  • Nano supply current : 120 nA (Typical)
  • Fixed threshold voltage (VIT-): 0.8 V to 5.4 V
    • Threshold voltages available in 100mV steps
    • High accuracy: ±0.5% (Typical)
    • Built-in hysteresis (VHYS): 5% (Typical)
  • Reset time delay (tD): capacitor-based programmable (TLV840C, TLV840M)
    • Minimum time delay: 40 µs (typical) without capacitor
  • Active-low manual reset (MR) (TLV840M)
  • Four output topologies:
    • TLV840xxDL: open-drain, active-low (RESET)
    • TLV840xxPL: push-pull, active-low (RESET)
    • TLV840xxDH: open-drain, active-high (RESET)
    • TLV840xxPH: push-pull, active-high (RESET)
  • Wide temperature range: –40°C to +125°C
  • Package: SOT23-5 (DBV)

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The TLV840 family of voltage supervisors or reset ICs can operate at high voltage levels while maintaining very low quiescent current across the whole VDD and temperature range. TLV840 offers best combination of low power consumption, high accuracy and low propagation delay (tp_HL= 30 µs typical).

Reset output signal is asserted when the voltage at VDD drops below the negative voltage threshold (VIT-). Reset signal is cleared when VDD rise above VIT- plus hysteresis (VHYS) and the reset time delay (tD) expires. Reset time delay can be programmed by connecting a capacitor between the CT pin and ground for TLV840C and TLV840M. For a minimum reset delay time the CT pin can be left floating. TLV840N does not offer a programmable delay and offers fixed reset delay timing options: 40 µs, 2 ms, 10 ms, 30 ms, 50 ms, 80 ms, 100 ms, 150 ms, 200 ms.

Additional features: Low power-on reset voltage (VPOR), built-in glitch immunity protection for VDD, built-in hysteresis, low open-drain output leakage current (Ilkg(OD)). TLV840 is a perfect voltage monitoring solution for industrial applications and battery-powered / low-power applications.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 8
Type Title Date
* Datasheet TLV840 Low Voltage Supervisor with Adjustable Reset Time Delay and Manual Reset datasheet (Rev. C) Aug. 13, 2020
Application notes Back-up Power Supply Switchover with Supply Voltage Supervisor & Power & Power M Apr. 09, 2020
Application notes Programmable Push-Button, Pulse Detector, and Pulse Generator Solutions Mar. 10, 2020
Selection guides Voltage Supervisors (Reset ICs) Quick Reference Guide (Rev. H) Feb. 28, 2020
User guides TLV840EVM Voltage Supervisor User's Guide Feb. 13, 2020
White papers Voltage Supervisor and Reset ICs: Tips, Tricks and Basics Jun. 28, 2019
Technical articles Automotive electronics design made easy Jul. 18, 2013
Technical articles John discusses benefits of LEDs in automobiles Jul. 16, 2013

Design & development

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Hardware development

document-generic User guide

The TLV840 evaluation module (EVM) is designed to evaluate the performance of the TLV840 product, which is a 5-pin voltage supervisor and reset IC. TLV840 offers operation up to 6 V, while maintaining low quiescent current of 1.2 µA (max) in addition to 2% maximum accuracy.

TLV840EVM supports all (...)

  • Package: 5-pin SOT-23
  • Programmable reset delay
  • Fixed delay
  • Open-drain/push-pull output topology
  • Manual reset

Design tools & simulation

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PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
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  • Supports simultaneous analysis of multiple products
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SOT-23 (DBV) 5 View options

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