TPS51285B

ACTIVE

5-V to 24-V, dual-synchronous buck controller with ultra-low quiescent current

Product details

Vin (min) (V) 5 Vin (max) (V) 24 Iout (max) (A) 20 Operating temperature range (°C) -40 to 85 Control mode D-CAP Rating Catalog Vout (min) (V) 4.5 Vout (max) (V) 5.5 Features Enable, Light Load Efficiency, Power good, Synchronous Rectification Iq (typ) (µA) 84 Duty cycle (max) (%) 100 Number of phases 1
Vin (min) (V) 5 Vin (max) (V) 24 Iout (max) (A) 20 Operating temperature range (°C) -40 to 85 Control mode D-CAP Rating Catalog Vout (min) (V) 4.5 Vout (max) (V) 5.5 Features Enable, Light Load Efficiency, Power good, Synchronous Rectification Iq (typ) (µA) 84 Duty cycle (max) (%) 100 Number of phases 1
WQFN (RUK) 20 9 mm² 3 x 3
  • Input Voltage Range: 5 V to 24 V
  • Output Voltages: 5 V and 3.3 V
    (Adjustable Range ±10%)
  • Built-in, 100-mA, 5-V and 3.3-V
    LDOs
  • Clock Output for Charge-Pump
  • ±1% Reference Accuracy
  • Adaptive On-Time D-CAP Mode Control
    Architecture with 400 kHz (CH1) and
    475 kHz (CH2) Frequency
  • Auto-skip and ULQ modes for long
    battery life in system stand-by mode
  • Internal 0.8-ms Voltage Servo Soft-Start
  • Low-Side RDS(on) Current Sensing Scheme
  • Built-In Output Discharge Function
  • Separate Enable Input for Switchers
  • Dedicated OC Setting Terminals
  • Power Good Indicator
  • OVP, UVP and OCP Protection
  • Non-Latch UVLO and OTP Protection
  • 20-Pin, 3 mm × 3 mm, QFN (RUK)
  • Input Voltage Range: 5 V to 24 V
  • Output Voltages: 5 V and 3.3 V
    (Adjustable Range ±10%)
  • Built-in, 100-mA, 5-V and 3.3-V
    LDOs
  • Clock Output for Charge-Pump
  • ±1% Reference Accuracy
  • Adaptive On-Time D-CAP Mode Control
    Architecture with 400 kHz (CH1) and
    475 kHz (CH2) Frequency
  • Auto-skip and ULQ modes for long
    battery life in system stand-by mode
  • Internal 0.8-ms Voltage Servo Soft-Start
  • Low-Side RDS(on) Current Sensing Scheme
  • Built-In Output Discharge Function
  • Separate Enable Input for Switchers
  • Dedicated OC Setting Terminals
  • Power Good Indicator
  • OVP, UVP and OCP Protection
  • Non-Latch UVLO and OTP Protection
  • 20-Pin, 3 mm × 3 mm, QFN (RUK)

The TPS51285A and TPS51285B are cost-effective, dual synchronous buck controllers with 5-V and 3.3-V LDOs, targeted for notebook system-power supply solutions. The device achieves low power consumption by the use of auto-skip and ULQ™ modes, which is beneficial for long battery life in system stand-by mode. The 256-kHz VCLK output is provided to drive an external charge pump, generating gate drive voltage for the load switches with minimum power consumption in the main converter. The device employs adaptive on-time D-CAP™ mode control which enables fast load transient response without external compensation network. The TPS51285A/B operates with supply input voltage ranging from 5V to 24V and supports output voltages of 5 V and 3.3 V. The TPS51285A and TPS51285B are available in a 20-pin 3 x 3 (mm) QFN package and is specified from –40°C to 85°C.

The TPS51285A and TPS51285B are cost-effective, dual synchronous buck controllers with 5-V and 3.3-V LDOs, targeted for notebook system-power supply solutions. The device achieves low power consumption by the use of auto-skip and ULQ™ modes, which is beneficial for long battery life in system stand-by mode. The 256-kHz VCLK output is provided to drive an external charge pump, generating gate drive voltage for the load switches with minimum power consumption in the main converter. The device employs adaptive on-time D-CAP™ mode control which enables fast load transient response without external compensation network. The TPS51285A/B operates with supply input voltage ranging from 5V to 24V and supports output voltages of 5 V and 3.3 V. The TPS51285A and TPS51285B are available in a 20-pin 3 x 3 (mm) QFN package and is specified from –40°C to 85°C.

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Technical documentation

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Type Title Date
* Data sheet Ultra-Low Quiescent (ULQ) Dual Synchronous Step-Down Controller with 5V/ 3.3V datasheet 12 Apr 2013
Application note Mosfet Driver Circuit Design Guide for TPS512xx (Rev. A) 01 Apr 2019

Design & development

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Simulation model

TPS51285B Unencrypted PSpice Transient Model Package (Rev. A)

SLVM846A.ZIP (87 KB) - PSpice Model
Package Pins Download
WQFN (RUK) 20 View options

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