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TPS65580

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4.5 to 18V Input, 2.5A/1.5A/1.5A Triple Sync. Step-Down Converter w/ Advanced D-CAP2™

Product details

Vin (min) (V) 4.5 Vin (max) (V) 18 Vout (min) (V) 0.76 Vout (max) (V) 7 Iout (max) (A) 2.5 Iq (typ) (mA) 2.9 Switching frequency (max) (kHz) 800 Features Enable, Over Current Protection, Power good, UVLO Fixed Operating temperature range (°C) -40 to 125 Rating Catalog Regulated outputs (#) 3 Control mode D-CAP2 Duty cycle (max) (%) 75 Type Converter
Vin (min) (V) 4.5 Vin (max) (V) 18 Vout (min) (V) 0.76 Vout (max) (V) 7 Iout (max) (A) 2.5 Iq (typ) (mA) 2.9 Switching frequency (max) (kHz) 800 Features Enable, Over Current Protection, Power good, UVLO Fixed Operating temperature range (°C) -40 to 125 Rating Catalog Regulated outputs (#) 3 Control mode D-CAP2 Duty cycle (max) (%) 75 Type Converter
HTSSOP (PWP) 20 41.6 mm² 6.5 x 6.4
  • Advanced D-CAP2 Control Mode
    • Fast Transient Response
    • No External Parts Required
      For Loop Compensation
    • Compatible with Ceramic Output
      Capacitors
  • Wide Input Voltage Range : 4.5 V to 18 V
  • Output Voltage Range : 0.76 V to 7.0 V
  • Highly Efficient Integrated FETs Optimized
    for Low Duty Cycle Applications
    • 160 mΩ (High Side) and 130 mΩ
      (Low Side) for 2.5A
    • 250mΩ (High Side) and 230mΩ
      (Low Side) for 1.5A
  • High Initial Reference Accuracy
  • Low-Side RDS(on) Loss-Less
    Current Sensing
  • Fixed 1.2 ms Soft Start
  • Non-Sinking Pre-Biased Soft Start
  • 700 kHz Switching Frequency
  • Cycle-by-Cycle Over-Current Limiting Control
  • OCL, OVP, UVP, UVLO, TSD Protections
  • Hiccup Timer for Over Load Protection
  • PowerGood
  • Adaptive Gate Drivers with Integrated
    Boost PMOS Switch
  • OCP Constant Due To Thermally Compensated
    rds(on) with 4000ppm/°C
  • 20-Pin HTSSOP
  • Advanced D-CAP2 Control Mode
    • Fast Transient Response
    • No External Parts Required
      For Loop Compensation
    • Compatible with Ceramic Output
      Capacitors
  • Wide Input Voltage Range : 4.5 V to 18 V
  • Output Voltage Range : 0.76 V to 7.0 V
  • Highly Efficient Integrated FETs Optimized
    for Low Duty Cycle Applications
    • 160 mΩ (High Side) and 130 mΩ
      (Low Side) for 2.5A
    • 250mΩ (High Side) and 230mΩ
      (Low Side) for 1.5A
  • High Initial Reference Accuracy
  • Low-Side RDS(on) Loss-Less
    Current Sensing
  • Fixed 1.2 ms Soft Start
  • Non-Sinking Pre-Biased Soft Start
  • 700 kHz Switching Frequency
  • Cycle-by-Cycle Over-Current Limiting Control
  • OCL, OVP, UVP, UVLO, TSD Protections
  • Hiccup Timer for Over Load Protection
  • PowerGood
  • Adaptive Gate Drivers with Integrated
    Boost PMOS Switch
  • OCP Constant Due To Thermally Compensated
    rds(on) with 4000ppm/°C
  • 20-Pin HTSSOP

The TPS65580 is a triple, advanced D-CAP2™ mode synchronous buck converter. The TPS65580 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, and low standby current solution. The main control loops of the TPS65580 uses the advanced D-CAP2™ mode control which provides a fast transient response with no external compensation components. The TPS65580 is able to adapt to both low equivalent series resistance (ESR) output capacitors such as POSCAP or SP-CAP, and ultra-low ESR, ceramic capacitors. The device provides convenient and efficient operation with input voltages from 4.5V to 18V.

The TPS65580 is available in 4.4mm × 6.5mm 20 pin TSSOP (PWP) package, and is specified from –40°C to 85°C ambient temperature range.

The TPS65580 is a triple, advanced D-CAP2™ mode synchronous buck converter. The TPS65580 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, and low standby current solution. The main control loops of the TPS65580 uses the advanced D-CAP2™ mode control which provides a fast transient response with no external compensation components. The TPS65580 is able to adapt to both low equivalent series resistance (ESR) output capacitors such as POSCAP or SP-CAP, and ultra-low ESR, ceramic capacitors. The device provides convenient and efficient operation with input voltages from 4.5V to 18V.

The TPS65580 is available in 4.4mm × 6.5mm 20 pin TSSOP (PWP) package, and is specified from –40°C to 85°C ambient temperature range.

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Technical documentation

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Type Title Date
* Data sheet 4.5V to 18V Input 1.5A/2.5A/1.5A Triple Synchronous Step Down Converter datasheet (Rev. B) 10 Dec 2013
EVM User's guide TPS65581 Buck Converter Evaluation Module User's Guide (Rev. A) PDF | HTML 12 May 2021
EVM User's guide TPS65580 Buck Converter Evaluation Module User's Guide (Rev. B) PDF | HTML 10 May 2021
Technical article Minimize the impact of the MLCC shortage on your power application 29 Mar 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TPS65580EVM-575 — 1.5A/2A/1.5A Triple Synchronous Step-Down Converter Evaluation Module

The Texas Instruments TPS65580EVM-575 evaluation module (EVM) is a fully assembled and tested circuit for evaluating theTPS65580 Synchronous Step-Down Converter. The EVM comprises a nominal 12 V input output synchronous buck converter with three output channels. Output channel 1 is 3.3 V at 1.5 A, (...)
User guide: PDF | HTML
Not available on TI.com
Evaluation board

TPS65581EVM-575 — TPS65581EVM-575 Triple Synchronous Step-Down Converter EVM

The Texas Instruments TPS65581EVM-575 evaluation module (EVM) is a fully assembled and tested circuit for evaluating the TPS65581 Synchronous Step-Down Converter. The EVM comprises a nominal 12 V input output synchronous buck converter with three output channels. Output channel 1 is 3.3 V at 1.5 (...)
User guide: PDF | HTML
Not available on TI.com
Simulation model

TPS65580 Unencrypted PSpice Transient Model Package (Rev. A)

SLIM314A.ZIP (49 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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HTSSOP (PWP) 20 View options

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