TPS65581

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4.5V to 20V Input, 3.3V 3A Synchronous Step-Down SWIFT™ Converter w/ Low-Side Gate Driver

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Product details

Parameters

Vin (Min) (V) 4.5 Vin (Max) (V) 18 Vout (Min) (V) 0.76 Vout (Max) (V) 7 Iout (Max) (A) 2.5 Iq (Typ) (mA) 2.9 Switching frequency (Max) (kHz) 700 Features Enable, Over Current Protection, Power Good, UVLO Fixed Operating temperature range (C) -40 to 125 Rating Catalog Regulated outputs (#) 3 open-in-new Find other Buck converters (integrated switch)

Package | Pins | Size

HTSSOP (PWP) 20 42 mm² 6.5 x 6.4 open-in-new Find other Buck converters (integrated switch)

Features

  • Advanced D-CAP2 Control Mode
    • Fast Transient Response
    • No External Parts Required
      For Loop Compensation
    • Compatible with Ceramic Output
      Capacitors
  • Wide Input Voltage Range :
    4.5 V to 18 V
  • Output Voltage Range :
    0.76 V to 7 V
  • Highly Efficient Integrated FETs
    Optimized for Low Duty Cycle
    Applications
    • 160 mΩ (High Side) and 130 mΩ
      (Low Side) for 2.5A
    • 250mΩ (High Side) and 230mΩ
      (Low Side) for 1.5A
  • High Initial Reference Accuracy
  • Low-Side RDS(on) Loss-Less
    Current Sensing
  • Fixed 1.2 ms Soft Start
  • Non-Sinking Pre-Biased Soft
    Start
  • 700 kHz Switching Frequency
  • Cycle-by-Cycle Over-Current
    Limiting Control
  • OCL, OVP, UVP, UVLO, TSD
    Protections
  • Hiccup Timer for Over Load
    Protection
  • PowerGood
  • Adaptive Gate Drivers with Integrated
    Boost PMOS Switch
  • OCP Constant Due To Thermally Compensated
    RDS(on) with 4000ppm/℃
  • 20-Pin HTSSOP
  • Auto-Skip Eco-mode for High Efficiency at
    Light Load
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Description

The TPS65581 is a triple, advanced D-CAP2™ mode synchronous buck converter. The TPS65581 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, and low standby current solution. The main control loops of the TPS65581 uses the advanced D-CAP2™ mode control which provides a fast transient response with no external compensation components. Advanced D-CAP2™ mode control supports seamless transition between PWM mode at higher load conditions and Eco-mode™ allows the TPS65581 to maintain high efficiency during light load conditions. The device is able to adapt to both low equivalent series resistance (ESR) output capacitors such as POSCAP or SP-CAP, and ultra-low ESR, ceramic capacitors. The device provides convenient and efficient operation with input voltages from 4.5V to 18V.

The TPS65581 is available in 4.4mm × 6.5mm 20 pin TSSOP (PWP) package, and is specified from –40°C to 85°C ambient temperature range.

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Technical documentation

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Type Title Date
* Datasheet 4.5V to 18V Input 1.5A, 2A, 1.5A Triple Synchronous Step-Down Converter datasheet (Rev. B) Dec. 10, 2013
Technical articles Minimize the impact of the MLCC shortage on your power application Mar. 29, 2019
User guides TPS65581EVM-575 1.5-A, 2.5-A, 1.5-A, Triple Synchronous Regulator Evaluation Mod Oct. 01, 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$25.00
Description
The Texas Instruments TPS65581EVM-575 evaluation module (EVM) is a fully assembled and tested circuit for evaluating the TPS65581 Synchronous Step-Down Converter. The EVM comprises a nominal 12 V input output synchronous buck converter with three output channels. Output channel 1 is 3.3 V at 1.5 A (...)
Features
  • Synchronous Buck Converter
  • 3 CH output
  • Internal Slow Start
  • Wide Input Voltage Up to 18 V
  • Integrated FETs
  • Eco-mode

Design tools & simulation

SIMULATION MODELS Download
SLVM942A.ZIP (51 KB) - PSpice Model

Reference designs

REFERENCE DESIGNS Download
Ten Output QR Flyback and Buck Converter Reference Design
PMP10822 The PMP10822 reference design utilizes two QR flyback, and four buck converters. The efficiency for the 12V and 24V flyback approaches 87%, while the 16V buck converter has efficiency greater than 89%.
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
HTSSOP (PWP) 20 View options

Ordering & quality

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