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Product details

Parameters

Output options Fixed Output Iout (Max) (A) 0.4 Vin (Max) (V) 5.5 Vin (Min) (V) 1.7 Vout (Max) (V) 1.8 Vout (Min) (V) 1.8 Fixed output options (V) 1.8 Noise (uVrms) 30 Iq (Typ) (mA) 0.4 Thermal resistance θJA (°C/W) 255 Load capacitance (Min) (µF) 0 Rating HiRel Enhanced Product Regulated outputs (#) 1 Features Enable, Reverse Current Protection Accuracy (%) 1 PSRR @ 100 KHz (dB) 16 Dropout voltage (Vdo) (Typ) (mV) 75 Operating temperature range (C) -55 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 open-in-new Find other Linear regulators (LDO)

Features

  • Controlled Baseline
    • One Assembly
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of
    –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Stable With No Output Capacitor or Any Value or Type of Capacitor
  • Input Voltage Range of 1.7 V to 5.5 V
  • Ultra-Low Dropout Voltage: 75 mV Typical
  • Excellent Load Transient Response—With or Without Optional Output Capacitor
  • New NMOS Topology Delivers Low Reverse Leakage Current
  • Low Noise: 30 µVRMS Typical
    (10 Hz to 100 kHz)
  • 0.5% Initial Accuracy
  • 1% Overall Accuracy Over Line, Load, and Temperature
  • Less Than 1-µA Max IQ in Shutdown Mode
  • Thermal Shutdown and Specified Min/Max Current Limit Protection
  • Available in Multiple Output Voltage Versions
    • Fixed Outputs of 1.2 V to 3.3 V
    • Adjustable Output from 1.2 V to 5.5 V
    • Custom Outputs Available
  • APPLICATIONS
    • Portable/Battery-Powered Equipment
    • Post-Regulation for Switching Supplies
    • Noise-Sensitive Circuitry Such as VCOs
    • Point of Load Regulation for DSPs, FPGAs, ASICs, and Microprocessors

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

All other trademarks are the property of their respective owners.

open-in-new Find other Linear regulators (LDO)

Description

The TPS736xx family of low-dropout (LDO) linear voltage regulators uses a new topology—an NMOS pass element in a voltage-follower configuration. This topology is stable using output capacitors with low ESR and allows operation without a capacitor. It also provides high reverse blockage (low reverse current) and ground-pin current that is nearly constant over all values of output current.

The TPS736xx uses an advanced BiCMOS process to yield high precision while delivering low dropout voltages and low ground-pin current. Current consumption, when not enabled, is under 1 µA and ideal for portable applications. The low output noise (30 µVRMS with 0.1-µF CNR) is ideal for powering VCOs. These devices are protected by thermal shutdown and foldback current limit.

open-in-new Find other Linear regulators (LDO)
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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 8
Type Title Date
* Datasheet Cap-Free NMOS 400-mA Low-Dropout Regulators With Reverse Current Protection datasheet (Rev. C) Feb. 13, 2009
* Radiation & Reliability reports TPS73618MDBVREP Reliability Report Apr. 11, 2016
Application notes LDO Noise Demystified (Rev. B) Aug. 18, 2020
Technical articles LDO basics: capacitor vs. capacitance Aug. 01, 2018
Technical articles LDO Basics: Preventing reverse current Jul. 25, 2018
Technical articles LDO basics: introduction to quiescent current Jun. 20, 2018
Application notes LDO PSRR Measurement Simplified (Rev. A) Aug. 09, 2017
Technical articles LDO basics: noise – part 1 Jun. 14, 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

CAD/CAE symbols

Package Pins Download
SOT-23 (DBV) 5 View options

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