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CD74ACT10

ACTIVE

3-ch, 3-input, 4.5-V to 5.5-V NAND gates with TTL-compatible CMOS inputs

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Data sheet

CD74ACT10

ACTIVE
Data sheet Order now

Product details

Technology family ACT Number of channels 3 Inputs per channel 3 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type TTL-Compatible CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 90 Rating Catalog Operating temperature range (°C) -55 to 125
Technology family ACT Number of channels 3 Inputs per channel 3 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type TTL-Compatible CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 90 Rating Catalog Operating temperature range (°C) -55 to 125
SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm)
  • Inputs Are TTL-Voltage Compatible
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
  • Inputs Are TTL-Voltage Compatible
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

The CD74ACT10 contains three independent 3-input NAND gates. The device performs the Boolean functions Y = (A • B • C)\ or Y = A\ + B\ + C\ in positive logic.

The CD74ACT10 contains three independent 3-input NAND gates. The device performs the Boolean functions Y = (A • B • C)\ or Y = A\ + B\ + C\ in positive logic.
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CD74HC10 ACTIVE 3-ch, 3-input, 2-V to 6-V 5.2 mA drive strength NAND gate Voltage range 2V to 6V, average propagation delay 20ns, average drive strength 8mA

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* Data sheet CD74ACT10 datasheet Nov 4, 2002

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