Información de empaque
| Encapsulado | Pines HTSSOP (PWP) | 20 |
| Rango de temperatura de funcionamiento (℃) -40 to 125 |
| Cant. de paquetes | Transportador 2,500 | LARGE T&R |
Características para LM21212-1
- Integrated 7-mΩ high-side and 4.3-mΩ low-side FET switches
- 300-kHz to 1.5-MHz frequency SYNC pin
- Adjustable output voltage from 0.6 V to VIN (100% duty cycle capable), ±1% reference
- Input voltage range 2.95 V to 5.5 V
- Start-up Into prebiased loads
- Output voltage tracking capability
- Wide bandwidth voltage loop error amplifier
- Adjustable soft-start with external capacitor
- Precision enable (EN) pin with hysteresis
- Integrated OVP, OCP, OTP, UVLO and power-good
- Thermally enhanced HTSSOP-20 exposed pad package
- Create a custom design using the LM21212-1 with the WEBENCH® Power Designer
Descripción de LM21212-1
The LM21212-1 is a monolithic synchronous point-of-load buck regulator that is capable of delivering up to 12 A of continuous output current while producing an output voltage down to 0.6 V with outstanding efficiency. The device is optimized to work over an input voltage range of 2.95 V to 5.5 V, making it suited for a wide variety of low voltage systems. The voltage mode control loop provides high noise immunity, narrow duty-cycle capability and can be compensated to be stable with any type of output capacitance, providing maximum flexibility and ease of use.
The LM21212-1 features internal overvoltage protection (OVP) and overcurrent protection (OCP) for increased system reliability. A precision enable pin and integrated UVLO allow turnon of the device to be tightly controlled and sequenced. Start-up inrush currents are limited by both an internally fixed and externally adjustable soft-start circuit. Fault detection and supply sequencing are possible with the integrated power good circuit.
The LM21212-1 is designed to work well in multi-rail power supply architectures. The output voltage of the device can be configured to track an external voltage rail using the SS/TRK pin. The switching frequency can be synchronized to the falling edge of a clock between frequencies of 300 kHz to 1.5 MHz.
If the output is prebiased at start-up, it does not sink current, allowing the output to smoothly rise past the prebiased voltage. The regulator is offered in a 20-pin HTSSOP package with an exposed pad that can be soldered to the PCB, eliminating the need for bulky heat sinks.