Información de empaque
| Encapsulado | Pines VSSOP (DGK) | 8 |
| Rango de temperatura de funcionamiento (℃) -40 to 85 |
| Cant. de paquetes | Transportador 3,500 | LARGE T&R |
Características para LP3982
- 2.5-V to 6-V Input Range
- MAX8860 Pin, Package, and Specification Compatible
- 300-mA Output Current
- 120-mV Typical Dropout at 300 mA
- 90-µA Typical Quiescent Current
- 1-nA Typical Shutdown Mode
- 60-dB Typical PSRR
- 120-µs Typical Turnon Time
- Stable With Small Ceramic Output Capacitors
- 37-µVRMS Output Voltage Noise
(10 Hz to 100 kHz) - Overtemperature/Overcurrent Protection
- ±2% Output Voltage Tolerance
- Create a Custom Design Using the LP3982 With the WEBENCH® Power Designer
Descripción de LP3982
The LP3982 low-dropout (LDO) CMOS linear regulator is available in 1.8-V, 2.5-V, 2.82-V,
3-V,
3.3-V, and adjustable versions. They deliver 300 mA of output current. Packaged in an 8-pin
VSSOP, the LP3982 is pin- and package-compatible with Maxim’s MAX8860. The LM3982 is also available
in the small footprint WSON package.
The LP3982 suits battery-powered applications because of its shutdown mode (1 nA typical), low quiescent current (90 µA typical), and LDO voltage (120 mV typical). The low dropout voltage allows for more utilization of a battery’s available energy by operating closer to its end-of-life voltage. The LP3982 device’s PMOS output transistor consumes relatively no drive current compared to PNP LDO regulators.
This PMOS regulator is stable with small ceramic capacitive loads (2.2 µF typical).
These devices also include regulation fault detection, a bandgap voltage reference, constant current limiting, and thermal-overload protection.