Información de empaque
| Encapsulado | Pines VSSOP (DGS) | 10 |
| Rango de temperatura de funcionamiento (℃) -40 to 125 |
| Cant. de paquetes | Transportador 2,500 | LARGE T&R |
Características para TPD2S703-Q1
- AEC-Q100 Qualified
- –40°C to +125°C Operating temperature range
- Short-to-battery (up to 18 V) and short-to-VBUS protection on VD+, VD–
- ESD Performance VD+, VD–
- ±8-kV Contact discharge (IEC 61000-4-2 and ISO 10605 330 pF, 330 Ω)
- ±15-kV Air-gap discharge (IEC 61000-4-2 and ISO 10605 330 pF, 330 Ω)
- High speed data switches (1-GHz bandwidth)
- Only requires 5-V power supply
- Adjustable OVP threshold
- Fast Overvoltage response time (200 ns typical)
- Thermal shutdown feature
- Integrated input enable and fault output signal
- Flow-through routing for data Integrity
- 10-pin VSSOP package (3 mm × 3 mm)
- 10-pin WSON package (2.5 mm × 2.5 mm)
Descripción de TPD2S703-Q1
The TPD2S703-Q1 is a 2-Channel Data Line Short-to-Battery, Short-to-VBUS, and IEC61000-4-2 ESD protection device for automotive high-speed interfaces like USB 2.0. The TPD2S703-Q1 contains two data line nFET switches which ensure safe data communication by providing best in class bandwidth for minimal signal degradation while simultaneously protecting the internal system circuits from any overvoltage conditions at the VD+ and VD– pins. On these pins, this device can handle overvoltage protection up to 18-V DC. This provides sufficient protection for shorting the data lines to the car battery as well as the USB VBUS rail. The overvoltage protection circuit provides the most reliable short-to-battery isolation in the industry, shutting off the data switches in 200 ns and protecting the upstream circuitry from harmful voltage and current spikes.
Additionally, the TPD2S703-Q1 only requires a single power supply of 5 V in order to optimize power tree size and cost. The OVP threshold and clamping circuit can be adjusted by a resistor divider network to provide a simple, cost effective way to optimize system protection for any transceiver. The TPD2S703-Q1 also includes a FLT pin which provides an indication when the device sees an overvoltage condition and automatically resets when the overvoltage condition is removed.
The TPD2S703-Q1 also integrates system level IEC 61000-4-2 and ISO 10605 ESD clamps on the VD+ and VD– pins, thus eliminating the need for external high voltage, low capacitance TVS clamp circuits in the application.