Información de empaque
| Encapsulado | Pines VQFN (RHA) | 40 |
| Rango de temperatura de funcionamiento (℃) -40 to 85 |
| Cant. de paquetes | Transportador 250 | SMALL T&R |
Características para TPS65020
- 1.2-A, 97% Efficient Step-Down Converter for
System Voltage (VDCDC1) - 1-A, Up to 95% Efficient Step-Down Converter for
Memory Voltage (VDCDC2) - 800-mA, 90% Efficient Step-Down Converter for
Processor Core (VDCDC3) - 20-mA LDO and Switch for Real-Time Clock
(VRTC) - 2 × 200-mA LDO for SRAM and PLL
- Dynamic Voltage Management for Processor Core
- Externally Adjustable Reset Delay Time
- Battery Backup Functionality
- Separate Enable Pins for Inductive Converters
- I2C-Compatible Serial Interface
- 85-µA Quiescent Current
- Low Ripple PFM Mode
- Thermal Shutdown Protection
- Push-Button I/O
Descripción de TPS65020
The TPS65020 device is an integrated power management IC for applications powered by one Li-Ion or Li-Polymer cell, and which requires multiple power rails.
The TPS65020 device provides three highly efficient, step-down converters targeted at providing the core voltage, peripheral, I/O, and memory rails in a processor-based system. All three step-down converters enter a low-power mode at light load for maximum efficiency across the widest possible range of load currents.
The TPS65020 device also integrates two 200-mA LDO voltage regulators, which are enabled with an external input pin. Each LDO operates with an input voltage range from 1.5 V to 6.5 V, thus allowing them to be supplied from one of the step-down converters or directly from the main battery. The two 200-mA LDO voltage regulators are intended for use with the SDRAM and PLL power supply in an Intel PXA270-based system. The serial interface is used for dynamic voltage scaling of the core voltage, masking interrupts, or for disabling or enabling and setting the LDO output voltages. The interface is compatible with both the fast and standard mode I2C specifications, allowing transfers at up to 400 kHz.
The TPS65020 incorporates a push-button debounced input and latched output for implementation of a push-button turnon feature, typically required in smart phones or wireless PDAs.