TPD4E1U06DCKEVM의 주요 특징
- Provides System Level ESD Protection for Low-Voltage IO Interfaces
- IEC 61000-4-2 Level 4:
- ±15kV (Contact discharge)
- ±15kV (Air-gap discharge)
- IO Capacitance 0.8pF (Typ)
- DC Breakdown Voltage6.5V (Min)
- Ultra low Leakage Current 10nA (Max)
- Low ESD Clamping Voltage
- Industrial Temperature Range: –40°C to 125°C
- Small, Easy-to-Route DCK, DBV, and DGS Packages
TPD4E1U06DCKEVM에 대한 설명
The TPD4E1U06DCKEVM is designed to allow 4-port analysis through a 100 Ω TMDS line, or differential pair. The board material is Rogers Board RO4350 with a Dielectric Constant, εr, of 3.48 +/- 0.05 and a loss tangent, δ, of 0.0031 @ 2.5 GHz. The port connectors are surface-mount SMP 50 Ω high speed connectors.
The EVM has two sections: CALIBRATION and TPD4E1U06DCK. The traces on the CALIBRATION section are identical to the traces on the TPD4E1U06DCK section, allowing the board's effect to be removed and only the device under test¡¯s performance to be evaluated, without having to de-solder the device under test.