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SN74LVC2G08-Q1

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Automotive, 2-ch, 2-input 1.65-V to 5.5-V 32-mA drive strength AND gate

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Data sheet

SN74LVC2G08-Q1

ACTIVE
Data sheet Order now

Product details

Technology family LVC Number of channels 2 Inputs per channel 2 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 2 Inputs per channel 2 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
SSOP (DCT) 8 11.8 mm² (2.95 mm × 4 mm) VSSOP (DCU) 8 6.2 mm² (2 mm × 3.1 mm)
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range (DCU package)
    • Device Temperature Grade 3: –40°C to +85°C Ambient Operating Temperature Range (DCT package)
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Can be Used as a Down Translator to Translate Input from a Maximum of 5.5 V Down to the VCC Level.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range (DCU package)
    • Device Temperature Grade 3: –40°C to +85°C Ambient Operating Temperature Range (DCT package)
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Can be Used as a Down Translator to Translate Input from a Maximum of 5.5 V Down to the VCC Level.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC2G08-Q1 performs the Boolean function Y = A • B or Y = /A + /B in positive logic.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC2G08-Q1 performs the Boolean function Y = A • B or Y = /A + /B in positive logic.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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Top documentation Type Title Format options Date
* Data sheet SN74LVC2G08-Q1 Dual 2-Input Positive-AND Gate datasheet (Rev. E) PDF | HTML Mar 1, 2004
More literature Automotive Logic Devices Brochure Aug 27, 2014

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5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
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SN74LVC2G08 Behavioral SPICE Model

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