封裝資訊
| 封裝 | 引腳 VQFN (RHB) | 32 |
| 作業溫度範圍 (°C) -40 to 125 |
| 包裝數量 | 運送包裝 250 | SMALL T&R |
DRV8702D-Q1 的特色
- AEC-Q100 Qualified for Automotive Applications
- Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature
- Single Half-Bridge Gate Driver
- Drives Two External N-Channel MOSFETs
- Supports 100% PWM Duty Cycle
- 5.5 to 45-V Operating Supply-Voltage Range
- PWM Control Interface
- Serial Interface for Configuration (DRV8703D-Q1)
- Smart Gate Drive Architecture
- Adjustable Slew-Rate Control
- Supports 1.8-V, 3.3-V, and 5-V logic inputs
- Current-Shunt Amplifier
- Integrated PWM Current Regulation
- Low-Power Sleep Mode
- Protection Features
- Supply Undervoltage Lockout (UVLO)
- Charge-Pump Undervoltage (CPUV) Lockout
- Overcurrent Protection (OCP)
- Gate-Driver Fault (GDF)
- Thermal Shutdown (TSD)
- Watchdog Timer (DRV8703D-Q1)
- Fault-Condition Output (nFAULT)
DRV8702D-Q1 的說明
The DRV870xD-Q1 devices are small half bridge gate drivers that use two external N-channel MOSFETs targeted to drive unidirectional brushed-DC motors or solenoid loads.
A PWM interface allows simple interfacing to controller circuits. An internal sense amplifier provides adjustable current control. Integrated Charge-Pump allows for 100% duty cycle support and can be used to drive external reverse battery switch. Independent Half Bridge mode allows sharing of half bridges to control multiple DC motors sequentially in a cost-efficient way. The gate driver includes circuitry to regulate the winding current using fixed off-time PWM current chopping.
The DRV870xD-Q1 devices include Smart Gate Drive technology to remove the need for any external gate components (resistors and Zener diodes) while protecting the external FETs. The Smart Gate Drive architecture optimizes dead time to avoid any shoot-through conditions, provides flexibility in reducing electromagnetic interference (EMI) with programmable slew-rate control and protects against any gate-short conditions. Additionally, active and passive pulldowns are included to prevent any dv/dt gate turn on.