封裝資訊
| 封裝 | 引腳 WQFN (NKD) | 64 |
| 作業溫度範圍 (°C) -40 to 85 |
| 包裝數量 | 運送包裝 1,000 | SMALL T&R |
LMK04906 的特色
- Ultralow RMS Jitter
Performance
- 100-fs RMS Jitter (12 kHz to 20 MHz)
- 123-fs RMS Jitter (100 Hz to 20 MHz)
- Dual Loop
PLLatinum™ PLL
Architecture
- PLL1
- Integrated Low-Noise Crystal Oscillator Circuit
- Holdover Mode when Input Clocks are
Lost
- Automatic or Manual Triggering/Recovery
- PLL2
- Normalized [1 Hz] PLL Noise Floor of –227 dBc/Hz
- Phase Detector Rate up to 155 MHz
- OSCin Frequency-doubler
- Integrated Low-Noise VCO
- PLL1
- 3 Redundant Input
Clocks with LOS
- Automatic and Manual Switch-Over Modes
- 50% Duty Cycle Output Divides, 1 to 1045 (Even and Odd)
- LVPECL, LVDS, or LVCMOS Programmable Outputs
- Precision Digital Delay, Fixed or Dynamically Adjustable
- 25-ps Step Analog Delay Control.
- 6 Differential
Outputs. Up to 12 Single Ended.
- Up to 5 VCXO/Crystal Buffered Outputs
- Clock Rates of up to 2600 MHz
- 0-Delay Mode
- Three Default Clock Outputs at Power Up
- Multi-mode: Dual PLL, Single PLL, and Clock Distribution
- Industrial Temperature Range: –40 to 85 °C
- 3.15-V to 3.45-V Operation
- Package: 64-Pin WQFN (9 mm × 9 mm × 0.8 mm)
LMK04906 的說明
The LMK04906 is the industry’s highest performance clock jitter attenuator with superior clock jitter cleaning, generation, and distribution with advanced features to meet high performance timing application needs.
The LMK04906 accepts 3 clock inputs ranging from 1 kHz to 500 MHz and generates 6 unique clock output frequencies ranging from 284 kHz to 2.6 GHz. The LMK04906 can also buffer a crystal or VCXO to generate a 7th unique clock frequency.
The device provides virtually all frequency translation combinations required for SONET, Ethernet, Fibre Channel and multi-mode Wireless Base Stations.
The LMK04906 input clock frequency and clock multiplication ratio are programmable through a SPI interface.