封裝資訊
| 封裝 | 引腳 SOIC (D) | 16 |
| 作業溫度範圍 (°C) -55 to 125 |
| 包裝數量 | 運送包裝 2,500 | LARGE T&R |
SN65LVDS31-EP 的特色
- Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard
- Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100-Ω Load
- Typical Output Voltage Rise and Fall Times of 500 ps (400 Mbps)
- Typical Propagation Delay Times of 1.7 ns
- Operate From a Single 3.3-V Supply
- Power Dissipation 25 mW Typical Per Driver at 200 MHz
- Driver at High Impedance When Disabled or With VCC = 0
- Bus-Terminal ESD Protection Exceeds 8 kV
- Low-Voltage TTL (LVTTL) Logic Input Levels
- Pin Compatible With AM26LS31, MC3487, and µA9638
- Cold Sparing for Space and High Reliability Applications Requiring Redundancy
SN65LVDS31-EP 的說明
The SN65LVDS31 is a differential line driver that implements the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. This driver will deliver a minimum differential output voltage magnitude of 247 mV into a 100-Ω load when enabled.
The intended application of this device and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.
The SN65LVDS31 is characterized for operation from –55°C to 125°C.