封裝資訊
| 封裝 | 引腳 SOIC (D) | 14 |
| 作業溫度範圍 (°C) 0 to 70 |
| 包裝數量 | 運送包裝 50 | TUBE |
SN74AS74A 的特色
- Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
SN74AS74A 的說明
These devices contain two independent positive-edge-triggered
D-type flip-flops. A low level at the preset (
) or clear (
) inputs sets or resets the outputs
regardless of the levels of the other inputs. When and are inactive (high), data at the
data (D) input meeting the setup-time requirements are transferred to
the outputs on the positive-going edge of the clock (CLK) pulse.
Clock triggering occurs at a voltage level and is not directly
related to the rise time of CLK. Following the hold-time interval,
data at the D input can be changed without affecting the levels at
the outputs.
The SN54ALS74A and SN54AS74A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS74A and SN74AS74A are characterized for operation from 0°C to 70°C.