SN65LVDS100EVM

SN65LVDS100 Evaluation Module

SN65LVDS100EVM

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Overview

The EVM allows evaluation of operation of the SN65LVDS100/101 or SN65CML100 high-speed differential translators/repeaters.  Differential input signals (LVDS, LVPECL, CML, etc.) can be applied and the device output can be observed across on board terminations, or via direct connection to 50-ohm oscilloscope inputs.  Single-ended LVPECL signals can also be applied by using the Vbb reference output voltage provided by either the SN65LVDS100/101 or SN65CML100 devices from TI.

Features

Hardware: SN65LVDS100/101EVM or SN65CML100EVM PWB

  • Screw-type SMA jacks serve as the I/O connectors
  • Banana jacks serve as the DC power input terminals

Literature:

a) The SN65LVDS100/101EVM or SN65CML100EVM user's guide (SLLU040A) Includes:

  • schematic
  • board layout
  • test results

b) The SN65LVDS100/101 data sheet (SLLS516)

c) Or the SN65CML100 data sheet (SLLS547)

LVDS, M-LVDS & PECL ICs
SN65LVDS100 2-Gbps LVDS, LVPECL & CML to LVDS buffer, repeater & translator SN65LVDT100 2-Gbps LVDS, LVPECL & CML to LVDS repeater/translator

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Evaluation board

SN65LVDS100EVM — SN65LVDS100 Evaluation Module

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Technical documentation

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Type Title Date
* EVM User's guide 2-GBPS Differential Repeater EVM (Rev. A) Nov. 11, 2002
Certificate SN65LVDS100EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
Data sheet SN65LVDx10x Differential Translator/Repeater datasheet (Rev. E) PDF | HTML Jul. 20, 2015
EVM User's guide 2-GBPS Differential Repeater EVM Aug. 08, 2002

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