LP2996LQEVAL
DDR 터미네이션 레귤레이터
LP2996LQEVAL
개요
The LP2996 evaluation board is designed to provide the design engineer with a fully functional prototype system in which to evaluate the LP2996 in both a static environment and with a complete memory system. There are two versions of the board, and while identical in functionality they differ in the package implemented; This is the WQFN package.
특징
- Source and sink current
- Low output voltage offset
- No external resistors required
- Linear topology
- Suspend to Ram (STR) functionality
- Low external component count
- Thermal shutdown
- Available in PSOP-8 package
Applications:
- DDR-I and DDR-II Termination Voltage
- SSTL-2 and SSTL-3 Termination
- HSTL Termination
멀티 채널 IC(PMIC)
주문 및 개발 시작
평가 보드
LP2996LQEVAL — DDR Termination Regulator
LP2996LQEVAL — DDR Termination Regulator
기술 자료
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TI에서 선정한 인기 문서
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2개 모두 보기
| 유형 | 직함 | 최신 영어 버전 다운로드 | 날짜 | ||
|---|---|---|---|---|---|
| * | EVM User's guide | AN-1268 LP2996 Evaluation Board (Rev. A) | 2013. 5. 7 | ||
| 인증서 | LP2996LQEVAL EU Declaration of Conformity (DoC) | 2019. 1. 2 |