SN65LVDS100EVM
SN65LVDS100 평가 모듈
SN65LVDS100EVM
개요
The EVM allows evaluation of operation of the SN65LVDS100/101 or SN65CML100 high-speed differential translators/repeaters. Differential input signals (LVDS, LVPECL, CML, etc.) can be applied and the device output can be observed across on board terminations, or via direct connection to 50-ohm oscilloscope inputs. Single-ended LVPECL signals can also be applied by using the Vbb reference output voltage provided by either the SN65LVDS100/101 or SN65CML100 devices from TI.
특징
Hardware: SN65LVDS100/101EVM or SN65CML100EVM PWB
- Screw-type SMA jacks serve as the I/O connectors
- Banana jacks serve as the DC power input terminals
Literature:
a) The SN65LVDS100/101EVM or SN65CML100EVM user's guide (SLLU040A) Includes:
- schematic
- board layout
- test results
b) The SN65LVDS100/101 data sheet (SLLS516)
c) Or the SN65CML100 data sheet (SLLS547)
LVDS, M-LVDS 및 PECL IC
주문 및 개발 시작
평가 보드
SN65LVDS100EVM — SN65LVDS100 Evaluation Module
SN65LVDS100EVM — SN65LVDS100 Evaluation Module
기술 자료
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TI에서 선정한 인기 문서
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2개 모두 보기
| 유형 | 직함 | 최신 영어 버전 다운로드 | 날짜 | ||
|---|---|---|---|---|---|
| * | EVM User's guide | 2-GBPS Differential Repeater EVM (Rev. A) | 2002. 11. 11 | ||
| 인증서 | SN65LVDS100EVM EU Declaration of Conformity (DoC) | 2019. 1. 2 |