C185EVK01
DS90C185 評估模組
C185EVK01
概覽
The C185EVK01 evaluation module helps you evaluate the operation and performance of the DS90C185 low-power 1.8-V FPD-Link LVDS serializer. The device operates off of a single 1.8-V supply and supports input pixel clocks from 25 MHz to 105 MHz.
特點
- Typical power of 50 mW at 75-MHz PCLK
- Drives displays up to 1400 x 1050 at 60 Hz (SXGA+)
- 2.94 Gbps of throughput
- Two operating modes: 24-bit and 18-bit RGB
- 25- to 105-MHz pixel clock support
- Single 1.8-V supply
- Sleep mode
- Spread-spectrum clock compatibility
- Small 6-mm by 6-mm by 0.8-mm QFN package
FPD-Link SerDes
技術文件
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| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| 證書 | C185EVK01/NOPB EU Declaration of Conformity (DoC) | 2019/1/2 | ||||
| 使用指南 | C185EKV01 User’s Guide | 2012/5/3 |