CDCUN1208LPEVM

CDCUN1208LP 評估模組

CDCUN1208LPEVM

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概覽

The CDCUN1208LP is a 2:8 fan-out buffer featuring a wide operating supply range, two universal differential/ single ended inputs, and universal outputs (HCSL, LVDS, or LVCMOS) with clock edge rate control. One of the device inputs includes a divider that provides divide values of /1, /2, /4, and /8.

The device is offered in a 32 pin QFN package. The CDCUN1208LP is flexible and easy to use. The application configures the device by setting the state of certain pins at device power-up. Alternately, the application can configure the device via SPI/I2C. The CDCUN1208LP delivers excellent additive jitter performance, and low power consumption. The output section includes four dedicated output supply pins enabling the operation of output ports from different power supply domains. This provides the ability to clock devices switching at different LVCMOS levels without the need for external logic level translation circuitry.

特點
  • Easy-to-use evaluation module to buffer low phase noise clocks up to 400 MHz
  • Easy device programming via host-powered USB port
  • Easy device programming via control pins
  • Rapid configuration through provided EVM Control Software
  • Can be powered from the USB port, or by an external 3.3V/2.5V/1.8V power supply
  • Single-ended or differential input
時鐘緩衝器
CDCUN1208LP 具含通用輸入及輸出及超低功耗的 2:8 扇出緩衝器
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CDCUN1208LPEVM — CDCUN1208LP Evaluation Module

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CDCUN1208LPEVM CDCUN1208LP Evaluation Module

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類型 標題 下載最新的英文版本 日期
* EVM User's guide CDCUN1208LP EVM User's Guide 2012/4/4
證書 CDCUN1208LPEVM EU Declaration of Conformity (DoC) 2019/1/2

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