HSMC-ADC-BRIDGE
高速 ADC 至 HSMC (Altera) 接頭轉接卡
HSMC-ADC-BRIDGE
概覽
The HSMC-ADC-Bridge passive interconnect board enables the output of TI’s LVDS output high speed ADCs to be directly connected to a standard HSMC interconnect header, a typical input on the latest Altera FPGA EVMs. This enables users of TI’s high speed data converter EVMs to directly interface to Altera FPGA’s for prototyping purposes, saving the time and cost of producing a custom prototyping board.
特點
- Enables direct connection from TI high speed ADC EVMs with LVDS outputs to the HSMC standard header
設計檔案
技術文件
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| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| 證書 | HSMC-ADC-BRIDGE EU Declaration of Conformity (DoC) | 2019/1/2 | ||||
| 更多文件說明 | TI and Altera Ease Design Process with Compatible Evaluation Tools | 2011/4/25 |