LP2996LQEVAL
DDR 終端穩壓器
LP2996LQEVAL
概覽
The LP2996 evaluation board is designed to provide the design engineer with a fully functional prototype system in which to evaluate the LP2996 in both a static environment and with a complete memory system. There are two versions of the board, and while identical in functionality they differ in the package implemented; This is the WQFN package.
特點
- Source and sink current
- Low output voltage offset
- No external resistors required
- Linear topology
- Suspend to Ram (STR) functionality
- Low external component count
- Thermal shutdown
- Available in PSOP-8 package
Applications:
- DDR-I and DDR-II Termination Voltage
- SSTL-2 and SSTL-3 Termination
- HSTL Termination
多通道 IC (PMIC)
技術文件
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| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | EVM User's guide | AN-1268 LP2996 Evaluation Board (Rev. A) | 2013/5/7 | |||
| 證書 | LP2996LQEVAL EU Declaration of Conformity (DoC) | 2019/1/2 |