TIDA-00393
新增 LDO 以提升待機模式效率的參考設計
TIDA-00393
概覽
This regulation topology is designed to increase the efficiency of a DC/DC buck converter by disabling the converter during light-load operation and providing a regulated output voltage with a low-Iq LDO. During no-load or light-load conditions, the LDO allows for low-noise, low-Iq output voltage regulation while the DC/DC is disabled. Once the load is engaged, the DC/DC converter can provide high efficiency at high load currents, thereby combining the benefits of both devices.
特點
- High Efficiency output regulation from no load to full load (3A)
- Ultra-low Iq with no load regulation (<15 uA)
- DC/DC output ripple less than 10mV peak to peak
- LDO output noise less than 200 uV RMS, 10Hz to 100kHz
- 3.3% Transient Droop @ 1.2V, 300mA to 3A, 1A/ms
已開發完全組裝的電路板，僅供測試與性能驗證，且為非賣品。
設計檔案與產品
設計檔案
下載立即可用的系統檔案以加速您的設計流程。
技術文件
=
TI 所選的重要文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 1
| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | 設計指南 | Adding an LDO for Increased Standby Mode Efficiency Design Guide | 2015/7/7 |