TPS53317AEVM-726
適用於 DDR VTT 的同步降壓轉換器評估模組
TPS53317AEVM-726
概覽
The TPS53317AEVM-726 is designed to demonstrate the TPS53317A in a typical low voltage application, simulating a DDR4 enviroment, while providing a number of test points to evaluate the performance of TPS53317A. The TPS53317AEVM-726 is designed to use a 1.2-V voltage rail to produce a regulated 0.6-V output at up to 6-A load current.
特點
- VIN: 1.1 V - 1.3 V
- VOUT: 0.6 VDC / 6A
- Integrated synchronous buck regulator employing D-CAP+ technology
- Convenient test points for probing critical waveforms
多通道 IC (PMIC)
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| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | EVM User's guide | Using the TPS53317AEVM-726 | 2015/11/18 | |||
| 證書 | TPS53317AEVM-726 EU Declaration of Conformity (DoC) | 2019/1/2 |