TPS7H3301EVM-CVAL
TPS7H3301-SP DDR 終端評估模組
TPS7H3301EVM-CVAL
概覽
TPS7H3301-SP source/sink Double Data Rate (DDR) termination regulator designed to support system needs for low noise applications.
Integrated solution with reduced system solution size, improved efficiency, and simple system design integration.
特點
- Source Sink Linear Regulator supporting current up to 3A
- Low output noise
- Small size
- Support DDR, DDR2, DDR3 and DDR4 applications
- Integrated solution that:
- Reduces the system solution size
- Improves efficiency
- Simplifies design integration
DDR 記憶體電源 IC
技術文件
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TI 所選的重要文件
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| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | EVM User's guide | TPS7H3301EVM-CVAL User's Guide (Rev. B) | 2020/10/30 |