選取版本
ADS98XX-FPGA-EXAMPLE-CODE
ADS98xx FPGA interface example code
Source code archive
文件
Manifest
版本資訊
Verilog modules for interfacing to the ADS98xx.
最新功能
- v1.0.0 - Initial release
- v1.1.0 - Moved posedge_detect module to it own file and updated coding-style