Dual active bridge DC:DC power stage for a level 3 (fast) EV charging station (pile)
This video provides an overview of our new reference design, implementing a single-phase dual active bridge (DAB) DC/DC converter. A DAB topology offers several advantages, such as soft-switching commutations, a decreased number of devices, and high efficiency. Our design is beneficial where power density, cost, weight, galvanic isolation, high voltage conversion ratio, and reliability are critical factors, making it ideal for EV charging stations and energy storage applications.
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Hello, everyone. My name is Harish. And I work as a systems engineer in the Grid Infrastructure team here at Texas Instruments. Today, we will discuss the design considerations for a 10 kilowatt dual active bridge DC/DC converter used in electric vehicle charging stations. The following will be the agenda for my presentation.
First, we will take a quick overview of the EV charging standards. Then, go through the different stages of the end equipment reference data for charging station from pa.com and identify the various topologies for the PLC stage and the DC/DC stage. Next, we will focus on the different [INAUDIBLE] equipment where the DC/DC converter can be used. Then we will go through a detailed analysis under different power topologies currently preferred by EV charging customers and analyze their relative merits and demerits.
Next, we will deep dive into the single phase dual active bridge design. There, we will spend time on the theory of operation of the converter, PWM switching [INAUDIBLE], design challenges involved in the focus of system design. And finally, conclude with the efficiency analysis and test results of the converter.
Now will go over some terminology in charging stations. The charging stations are classified based on power levels. Shown in the table below are different levels of EVSE charges. The level 1 EV charging station consists of a single phase AC subplate supplying an onboard charger which is connected to a battery. The level 1 charges can go up to a maximum power of 2 kilowatt and is primarily used in [INAUDIBLE] applications.
The level 2 charging station has a three-phase or a multi-phase subplate feeding an onboard charger. These chargers can [INAUDIBLE] up to a power low of 20 kilowatt and are used for commercial purposes. The DC charging station is a level 3 charger which can [INAUDIBLE] for very high powered levels in the range of 120 to 240 kilowatts. The level 3 chargers typically charge the battery to 80% state of charge in under 30 minutes.
In order to achieve such high power levels, we need modular DC/DC converters which can be stacked. Stacking of converters inside the vehicle will make the vehicle bulky. Hence, the stack of converters are placed outside the vehicle. And these constitute Electric Vehicle charging station. The EV charging station is directly interfaced with the battery of the vehicle bypassing the onboard charger as shown in the [AUDIO OUT].
Now, we will go over the subsystem level block diagram of the electric vehicle charging power module. Shown on the left is the End Equipment Reference Diagram, EERD, of our electric vehicle charging station from ti.com. On the top left, we have the three-phase [INAUDIBLE], which is connected to the AC/DC power stage. This block converts the incoming AC voltage into a fixed DC voltage of around 600 to 800 volts.
This voltage serves as an input to the DC/DC power stage which processes power and interfaces directly with the battery on an electric vehicle. The AC/DC and DC/DC status are highlighted in red in the above figure. The dotted line between the two power processing units is to indicate them as two separate subsystems within the power module.
The gate drivers driving the MOSFETs also form part of the power stage. In addition to the power stage, we have the current and voltage sensing blocks and the input and output of both status. This is primarily used for control in production purposes.
Each power stage has a separate controller which is responsible for processing of analog signals and providing fast control action. Apart from this, we have different blocks for temperature sensing, interface for [INAUDIBLE], ethernet, and RS-483, and also isolated and non-isolated DC/DC converter for power in the auxiliary circuits, like the fans for cooling the heat sinks, isolated amplifiers, et cetera.
Our focus subsystems for today's session will be the ones highlighted in the box on the right, where we focus on the AC/DC power stage, DC/DC power stage, current sensing, voltage sensing, digital controller, auxiliary power tree, and finally the gate driver. Here, we captured the different topologies which are prominently used by the customers for the AC/DC stage and the DC/DC stage.
The block diagram shows two main blocks, the AC/DC power stage and the DC/DC power stage as you've seen before. The AC/DC power stage produces a stable DC link voltage of around 800 volts from the three-phase resonance. The DC/DC stage operates on this input voltage to produce a regulated output voltage. This voltage is generally governed by standards and can be between 50 to 500 volts, as per the [INAUDIBLE] standard, or 200 to 500 volts as per the Combo-1 standard.
The following are the most popular topologies which are used for the AC/DC power stage. There, the two level PFC, the neutral point clamped 3-level PFC, the three-phase Vienna rectifier, and the 3-level T-type PFC. The TIDM-1000 and TIDA-01606 are elaborate reference designs for three-phase Vienna rectifier and the 3-level T-type PFC.
Our focus for this presentation will be the DC/DC power stage highlighted in the block diagram. Some of the popular options for the stage are the phase shifted full bridge, the LLC resonance converter, the dual active bridge, and the dual active bridge in CLLC mode. TIDM-02002 and TIDA-010054 are reference designs associated with the dual active bridge in CLLC mode and the single phase dual active bridge. We will explore each of the topologies during the course of this presentation in detail.
Next, we will capture the importance of DC/DC converter in adjacent end equipment. Shown on the left is a block diagram which summarizes the utility of DC/DC converter in different end equipments. As seen from the previous slides, the DC/DC converter forms an important subsystem of an electric vehicle charging station. It also finds important applications in the maximum power point tracking states of a solar photovoltaic system, power conversion systems in an energy storage system, and as a boost converter interfacing the battery and the inverter of an electric traction motor system as shown on the bottom left of the slide. In this presentation, we will focus on the DC/DC converter subsystem in an electric vehicle charging station.
Now, we will briefly go over the design challenges in a DC/DC converter for charging stations. DC charging stations, as we have seen before, require high power converters in the range of 40 to 240 kilowatt which are capable of charging the battery within 60 minutes.
These fast charging applications require modular DC/DC converters which can be [INAUDIBLE] to cater to different power levels, thereby enabling faster charging. The most important parameters in a DC/DC converter are the energy density and the system efficiency.
Energy density is the amount of energy we can transfer for a given one loop of the converter. If we can double the power output for the same size, it results in significant cost savings and also helps in fast charging. This is accomplished by operating the converter at high switching frequencies which reduces the size of magnetics, thereby helping in achieving in higher power density. Higher system efficiency means lower losses and a smaller heating solution for a given application. It also reduces the thermal stresses on devices, thereby contributing to longer life expectancy of the parts.
Next is bidirectional operation. The latest trend in automotive technology is the concept of Vehicle to Grid, V2G. This allows for a flow of energy from the battery of electric equipment to grid. This can be used for stability of the grid when the vehicle is parked or not in use. This requires the DC/DC converter to be bidirectional for supporting such applications.
The converter must also be capable of providing galvanic isolation between the input and output states through a high frequency transformer with the required voltage conversion ratio as per the application. The converter must also operate at high efficiency through inherent soft switching methods like ZVS and ZZS, or via input and output with this without the requirement of additional parasitic components.
Finally, the DC/DC converter should easily interface with the battery. Shown on the right is a figure containing the charging profiles for the lithium ion and lead acid battery. The converter must be capable of charging the battery at constant current and a constant [INAUDIBLE], depending on the battery's state of charging.
Let's examine some popular DC/DC converters used in the DC/DC power stage of a charging station. The first one is the dual active bridge. It consists of full bridge with active switchers on both the primary and secondary sides connected together by a high frequency transformer.
Because of the inherent [INAUDIBLE] current in one of the bridges, the current discharges the output capacitance of the switches of one bridge, say the second [INAUDIBLE], and some of the switches of the primary side, thereby enabling zero voltage switching turn on transition. In addition to this, lossless capacitance [INAUDIBLE] can be used across the switches to reduce the turn off losses.
The main advantages of this converter are its inherent bidirectional capability and its modularity that allows for it to be scaled to higher power levels. The dual active bridge can be controlled through the single, double, and triple phase shift modulation schemes. The graph above shows the soft switching performance of a dual active bridge with respect to phase.
Direct curves show the soft switching boundary for the input and output side bridges for different values of voltage gate. In order to operate in soft switching region over a wide boundary, we need to use advanced modulation strategies like triple phase shift. We will go to a detailed analysis of the dual active bridge later during the presentation.
On the right is the phase shifted full bridge, which is similar to a dual active bridge except that the active switches on the secondary are replaced with diodes. [INAUDIBLE] only for unidirectional power transfer. Similar to a dual active bridge, it is modular and can be scaled to higher power levels.
The power transferred between the primary and the secondary is controlled by varying the phase between the switch legs of the primary bridge. As a result, it is possible to obtain zero voltage switching turn on of one leg and a lower [INAUDIBLE] turn on on the other leg, thereby minimizing the turn on noises. The passive diodes on the secondary can experience hard switching and result in more conduction losses which reduces the efficiency of this kind of converter.
Continuing on the same road, shown on the left is the LLC resonant converter with full bridge secondary diodes. The gain of this converter is a function of the switching bridge gain, the [INAUDIBLE] gain, and the transformer [INAUDIBLE]. The output voltage regulation is varied by varying the switching frequency of operation.
Looking into the graph on the right, we see that there are three modes or regions of operation-- operation at resonant frequency, operation above resonant frequency, and operation below resonant frequency. During the below resonant frequency operation, the resonant half cycle inductor current reaches the value of magnetizing current within the switching cycle. This leads to soft switching across the secondary rectifier diodes, but on the other hand, leads to more conduction losses due to increased circulating energy.
The above resonant frequency operation leads to switching losses due to hard commutation of the secondary rectifier diodes, but on the other hand, leads to lower conduction losses due to reduced circulating energy. Hence, the best performance of these converters is often when they are operated close to the resonant frequency where zero voltage turn on and zero current switching turn off is possible. This converter provides unidirectional power flow and is generally used for applications which are less than 5 kilowatts.
The CLLC incorporates all the functionalities of the LLC described above, but a major advantage of this topology is that with the use of active switches across the secondary, we can obtain bidirectional power transfer. The zero voltage switching zero current switching operation of this converter, over a large load range, results in increased efficiency.
This converter is primarily suited for onboard charger application, but can be used at higher power levels up to 10 kilowatt. But scaling to higher power levels and paralleling can be difficult as it requires a highly symmetrical tank structure. And a slight variation in inductance of the [INAUDIBLE] can affect the resonant frequencies, thereby affecting the voltage transfer levels of this converter.
The table shown summarizes the four topologies which we have described in the previous slides. We compared each of them based on the different performance criteria. In terms of the peak stress on the devices, [INAUDIBLE] switches, and the capacitors, we see that the dual active bridge has the lowest distance. This is because the peak current in topologies like the LLC and the CLLC are higher because of their inherent resonant behavior, making them prone to more stress.
This also means that for a given kilovolt ampere rating of the transformer, the ratio of the available output power to the desired transformer KVA rating is the highest [INAUDIBLE]. Secondly, the outermost currents in the input and the output capacitors offer dual active bridge [INAUDIBLE]. So the capacitors can be sized lesser. And they need to handle lesser amount of stress due to their input.
Next, in terms of bidirectional operation, we see that the dual active bridge and the CLLC are clear winners. The next important parameter to consider is the efficiency. The LLC resonant converter and the CLLC converter provide the best efficiency numbers because they can provide zero voltage switching on all switches over wide operating regions compared to the dual active bridge in the phase shifted full bridge.
Even during turn off, the CLLC and the LLC have better performance because primary side turn off is decided by the magnetising conductor current which is low. And secondary side switches turn off at zero current switching. The better switching performance of the LLC and the CLLC make them clear winner when it comes to efficiency numbers.
In terms of modularity and scaling up to higher power levels, the dual active bridge provides the best results. Finally, in terms of the complexity of control, the phase shifted full bridge and the single phase shift dual active bridge are the easiest. But when it comes to implementing dual phase shift and triangular phase shift for the dual active bridge, the control complexity increases.
Considering the growing interest and popularity among the EV charging customers, under [INAUDIBLE] listed advantages, the single phase dual active bridge was chosen as the topology for TI design implementation.
We will now look at the dual active bridge TI design, TIDA-010054. The input voltage to this converter is typically the output path PFC rectifier state which is around 700 or 800 volt DC. The regulated output voltage of the converter is from 300 to 500 volts as per Combo-1 charging standards.
The converter is designed for a power level of 10 kilowatt across the output over this range. The ZDS turn on operation enables soft switching over a wide range of input and output voltages, that way enabling the converter to operate at high efficiency, up to around 98%. The converter operates under the single phase shift modulation scheme with the switches operating at a fixed 800 kilohertz switching frequency. The control loop was implemented as a simple voltage mode control with a [? PID ?] controller which transmits the voltage error into phase shift value.
The intended application of this converter is in EV charging stations. It can also be used in other [INAUDIBLE] equipment like the MPPD stage of a DC/DC solar PV, Power Conversion Systems, PCS, as previously discussed. The bottom red portion of the slide shows the broad diagram of the converter. Each section of the converter comprising the power board, including the voltage and current sensing, the gate driver card and the control card, will be examined in greater detail in the upcoming sections.
The state of art silicon hardware MOSFETs offer best in class power density and efficiency. The UCC power factory zero dual channel reinforced resonated gate driver provides isolation of the control circuit from the high voltage power states. It also helps in the fast turn on and turn off of the silicon hybrid MOSFETs.
The F280049 control card provides the necessary controller functions as well as receives input from the ADC and output the necessary control actions to the PW within a single control loop cycle. Shown on the bottom left are the various TI devices which have been used in this TI design, which will be evaluated later in the course of this presentation.
Let's now walk through the physics of the dual active bridges. From the analogy of power systems, we know that when two voltage sources are connected by lined reactors, the power transfer takes place from the leading bus to the lagging bus. The magnitude of power transfer and the direction can be controlled by varying the phase angle between the two buses.
Similarly, in the dual active bridge, we have two full bridges connected together by a high frequency transformer. The modulation of the switches produces high frequency square waves across the primary and the secondary. These square waves are phase shifted with respect to each other. This leads to power transfer from the leading leg to the lagging leg, depending on the phase of the bridges.
The transformer provides the required galvanic isolation and the voltage conversion ratio. The leakage in the currents of the transformer plays a similar role to the lined reactors between the two buses and the exit power transfer. The major advantage of this topology is that due to natural lagging current in one of the bridges, the inductor stored energy passes zero voltage switching of the lagging bridge switches and some switches of the leading bridge during the dead time of the switches without any additional passing components. In addition, lossless capacitors numbers can be placed across the primary and the secondary side switches to further reduce the switching losses which are currently being turned off.
Now let's understand the switching sequence of the dual active bridge. All switches operate at a constant duty ratio of 0.5. It means that each of the switches is on for half the switching period. Depending upon the phase shift, as shown in the figure on the right [INAUDIBLE], there exists power transfer phase and the [INAUDIBLE] phase where the energy is circulated between the inductor and the output capacitances at the MOSFETs. Charging and discharging them until [INAUDIBLE].
In the waveform shown on the right, we see that during the first phase, the voltage across the transformer primary and secondary are both negative. This means that the following combinations of switches are on on the primary and secondary. It's Q2 with its parallel diode D2, and Q3 with its anti-parallel diode, D3, on the primary, and Q6 with the D6, and Q7 with the [INAUDIBLE] diode D7 on the secondary power.
Let us assume, for instance, that Q2 and Q3 on the primary are on. And Q6 and Q7 on the secondary are on. Before Q1 and Q4 are turned on at instances as shown in the figure, there will be a small dead time where the diodes across Q1 and Q4, namely D1 and D4, conduct to discharge the capacitances across the MOSFETs. That way, creating a zero voltage [INAUDIBLE] switches. Then Q1 and Q4 are turned on. And this phenomenon is referred to as zero voltage switching. And this will be discussed in great detail in a later section.
Thus, there exists a [? freewheeling ?] phase phase and a power transfer phase within a certain period [INAUDIBLE] dual active bridge converter. The longer the [INAUDIBLE] between the diode and the switches, longer is the amount of voltage that is imposed across the primary and larger is the energy that is transferred to the secondary.
The blue waveform which is shown in the figure is the inductor current of the form. The slope of the inductor current varies according to the difference of the plane width and secondary serial voltage across the inductor. The switching sequence proceeds in a similar manner during [INAUDIBLE] switching circuit.
Now let's explain the phenomenon of zero voltage switching in a dual active bridge converter. Shown on the top left of the slide are the different transitions of the switches across the secondary during the phenomena of zero voltage switching. During interval 1, the switches Q1 and Q4 are on across the primary. And they apply a positive voltage equal to the input voltage across the transformer [? primary ?] [INAUDIBLE].
In the secondary state, switches Q6 and Q7 are on a plane and [INAUDIBLE] a voltage equal to the output voltage across the transformer secondary. During the transition from interval 1 to 2, the switches Q6 and Q7 are turned off. And the current starts flowing through the open capacitance of the switches.
This current charges the capacitor across Q6 and Q7 to the secondary signal voltage, but discharges the capacitors across Q5 and Q8 to zero. In order to maintain the same direction of current, the current now starts flowing through the diodes D5 and D8, effectively clamping the voltage across the capacitor to zero. Now the switches Q5 and Q8 are turned on with the voltage across them clamped to zero. This phenomenon is referred to as zero voltage switching.
Now, we will go through some of the important aspects to be considered in designing the dual active bridge converter. First to look at is the transformer turns ratio. The turns ratio is selected according to the application. In this design, the transformer turns ratio is chosen to step down an AC voltage from 800 volts to 500 volts, which gives us a factor of [? 1 less ?] [? 20.624. ?]
As the voltage across the transformer primary and secondary change, the voltage transfer gain of the duel active bridge converter changes from [INAUDIBLE]. In order to maximize the zero voltage switching grid and reduce and switching losses, we should ensure that we operate the voltage gain of 1 where the primary voltage is equal to the reflectance [INAUDIBLE] voltage.
The second important design parameter is the transfer switching frequency. As we go higher in switching frequency, we can compact, reduce the size of transformers and inductors. In a dual active bridge, we have zero voltage switching turn on across most of the switches. The non-zero voltage switching switches cause significance switching during turn on and turn off. And this increases significantly with increased switching frequency.
So the trade off is essentially between the heat sink and the transformer size with the given thermal solution and target efficiency. Also, care needs to be taken to ensure that efficiency does not drop very low at right load conditions. The higher switching frequency can cause significant loss at light load, which can hamper performance.
And so the control loop bandwidth is an important parameter which is dependent on switching frequency, taking into account all the above reasons, the switching frequency for operation for the dual bridge converter was taken to be around 100 kilohertz.
In addition to the above, the leakage inductance, magnetizing inductance, and output capacitance all play a significant role in the converter design. The leakage and the magnetizing inductive selection is elaborated in the next slide. The capacitor must been chosen to handle sufficient ripple and keep the output voltage between the recommended ripple specification.
Moving on, we will continue to elaborate on the design considerations for the dual active bridge. The next important design consideration is the soft switching range. The voltage transfer ratio of the converter is a function of turns ratio of the transformer and the input and the output voltages. We see from the figure on the top right that when the voltage transfer ratio is equal to 1, we get soft switching on both the leading bridge and the lagging bridge exists for all values of power.
In practice, though, it is not possible to obtain soft switching over the entire power range due to widely varying input and output voltages. Depending upon the deviation of the voltage transfer ratio from unity, one of the bridges, either the lagging bridge the leading bridge structures, will get to hard switched. And this can contribute to significant switching losses.
This happens because the total capacitance [INAUDIBLE] in the switching mode has not been discharged by the inductor stored energy during dead time. This effort is generally more prominent of light loads when the current is lesser. In such cases, the dead time of the converter will be adjusted in accordance with the current in order to improve the switching performance.
Shown at the bottom right is the relationship between the phase and the voltage transfer ratio in order to obtain source fitting for the leading and the lagging bridges. The next important design consideration is the leakage inductance. This design is generally a tricky process. The required inductance and the power output are inversely related. Made Lower inductance leads to a higher power transfer capability. And therefore, we can get higher power transfer using smaller range of phase shift values.
This calls for using high resolution variation of phase shift steps through a microcontroller to obtain the desired output voltage regulation. Using lesser inductance allows for inductance to be easily integrated with the transformer. Lower inductance also leads to lower RMS current which the capacitor needs to handle and also lowers the transformer and the switch RMS currents.
But the disadvantage of lower inductance is the ability of the zero voltage switching and soft switching of the converter reduces as the load is reduced. Higher inductor enables the ZVS [INAUDIBLE] very low load level. But it will be difficult to integrate the inductor with the transformer because it tends to become bulky. The next important design consideration is the magnetizing inductance. Magnetizing inductance is a function of transformer design. And it should be large, at least 10 times the value of leakage inductance.
Now let's walk through the topology and system architecture of TIDA-010054 single phase shift scheme dual active bridge converter. The main converter is made up of three constituent boards. The red section of the block diagram consists of the main power states board containing the silicon carbide MOSFETs transformer, input and output capacitors, isolated voltage and current sensing circuits.
The section of board highlighted in purple is the control card. And the one highlighted in green is the gate driven card, which is a daughter card inserted into the main power board. We will look into each of these sections in greater depth in the upcoming slides.
Here we see the actual prototype 10-kilowatt dual active bridge converter which we have designed out of our facility. Shown on the left is the top view of the converter. We have the input side capacitor and the output side capacitors designed to handle the voltage ripple of the converter. We have four daughter gate level currents which are inserted onto the main power board. Two are on the primary for driving the primary silicon carbide FETs. Two are on the secondary for driving the secondary [INAUDIBLE] silicon carbide FETs.
We have a transformer which provides the required galvanic isolation between the primary and the secondary, and also provides the necessary voltage conversion ratio. We have put in and additional shim inductor in order to aid power transfer which adds to the leakage inductance which is actually present in the transformer.
This portion of the circuit basically implements the voltage in the current sensing pieces. We have the F280049 control card here, which provides the necessary control action. Shown on the right is the side view. And on the bottom, as you can see here, we have mounted the silicon carbide FETs along with the heat sink. These FETs are on the primary. And these FETs are on the secondary.
Let's start exploring the block diagram in greater detail, starting with the gate level. The gate level is housed inside the daughter card which is mounted on the main power board as we have seen before in the previous slide. This figure shows a detailed block diagram of the gate driver card. The UCC21530 is the gate driver IC, which is responsible for sending the gating pulses to turn on and turn off the MOSFETs.
It is a dual channeled, reinforced, isolated gate driver which receives PWM pulses from the controller and drives the gate. The power supply to the gate driver card is from a firewall delay on the main board. This firewall delay drives an SN6501 push/pull transformer driver which generates the required bias voltages of plus 15 volt and minus 5 volt for the gate driver.
There are additional discrete circuits implemented on the gate level card which implement the [INAUDIBLE] of the short circuit detection and the two level turn off. These circuits generate a false signal whenever there is a short circular detected. In addition, there is a reset line from the controller to reset the fault condition.
The fault and the reset signals are isolated from the power stage using an isolated ISO7721. The TPS7B6950 is a low dropout regulator which provides the required firewall supply for powering the discrete circuits. In addition, this gate drive design also uses TL431 which is a shunt regulator for setting a four-walled reference and LME762, which is a high-speed comparator used in detecting the short circuits.
Now let's see some of the critical requirements of the silicon carbide gate driver IC, and how we UCC21530 meets our requirements. Shown on the left are the critical requirements of a silicon carbide gate driver. Since this design is for 10 kilowatt, with the higher voltage levels it is good to have reinforced isolation between the power stage and the control circuitry.
Common mode transient immunity is an important parameter when operating the converter at a higher frequency. This is very important for driving silicon carbide MOSFETs at hundreds of kilohertz. Only a gate driver with good common mode transient immunity can support fast switching speeds by keeping the rise or fall times lower, thereby reducing the transitional losses. Fast switching silicon carbide applications also require the capability of detecting short circuits and taking corrective actions.
Low propagation delay is another desired characteristic of the gate driver. Also, it should have sufficiently high drive voltage, greater than 15 volt with good current sourcing and sinking capability. With high drive voltage, the drain source resistance of the silicon carbide MOSFETs are lower. And hence, we will have lesser conduction losses.
Higher drive strength also contributes to lower switching losses by turning on and turning off the FETs quickly. Shown on the right are the features of UCC21530 taken from the data sheet. The UCC21530 has reinforced isolation, 4 ampere peak sourcing, and 6 ampere peak current sinking capability, 90 nanosecond propagation delay, a common mode transient community of 100 volt per nanosecond, a high drive output voltage of up to 25 volts, and programmable dead time control to prevent shoot through in half bridge applications. With all these features, the UCC21530 satisfies an ideal gate level for this TI design.
Next we will discuss about the isolated sensing of primary and secondary state voltages. The primary and secondary state voltages which have to be sensed and their associated signal conditioning circuitry are highly [INAUDIBLE]. We will discuss about the details in the upcoming slides.
So we all know a simple voltage divider circuit feeding the microcontroller can be used to measure the voltages. Then why do we need isolated sensing? The safety regulations nowadays require an actual isolation barrier to be in place between the high voltage site and the controller while not relying on simple transistors only. Moreover, we are operating at higher DC link voltages of 800 volts and 500 volts. Hence, it is mandatory that we use some kind of isolation between the power circuit and the control circuitry.
Also, the on-chip microcontroller ADC is not referenced due to the same point as the high voltage resistive divider reference. The controller is mostly differentiated to primary ground or secondary ground, or it has its own reference. Hence, we have an equipment for isolated sensing.
TI's isolated amplifier, AMC1311, provides reinforced isolation up to 7 kilovolts between the high voltage side and the controller. The AMC1311 requires external 5 volt and 3.3 volt as power supply. The voltage across the resistive divider is scaled down to 0 to 2 volt range, compatible to the input range of AMC1311.
The analog output voltage is directly fed to the ADC pin of the microcontroller, or it can be filtered and scaled to match the full scale range of the ADC. This is done typically through a high speed [INAUDIBLE] like OPA320. The top right portion of the slide shows the typical implementation of an isolated sensing in power circuits.
Now let's go through the isolated sensing of primary and secondary side currents. The primary and secondary site current which needs to be sensed and the associated signal conditioning circuit is shown in red. The input and output currents are sensed using shunt resistors. And these resistors can be placed on the high side on the low side depending upon the application. The time current [? is sensed ?] using a current transformer, we will discuss about the implementation details in the upcoming slides.
Now let go over the design considerations for current sensing. There are different methods for current sensing presently used in the industry. Some of the popular ones are listed on the table. These measurement methods can be broadly classified into direct and indirect sensing methods. The direct methods include shunt resistor based sensing and transformer or FET onto [? resistance ?] based sensing.
The indirect methods involve sensing the magnetic field around the current carrying conductor like Hall effect sensor, current transformers, and the Rogowski coil. Of all available methods, shunt resistor based sensing is the most popular and widely used. This is a low cost implementation that is highly robust and provides good accuracy. The transformer drain source resistance based current sensing is also low cost and requires minimal additional hardware. But it is not reliable for accurate measurement of current as the RBS1 of the silicon carbide MOSFET is a function of the applied gate source voltage and is subject to change as the FET gets heated.
The next option is to use isolated sensing methods using current transformer, Rogowski coil, and Hall effect sensor. These methods are very reliable and accurate and are particularly useful in high frequency DC/DC applications where the requirement is to measure fast switching AC currents. But these tend to be on the costlier side.
From the point of view of bandwidth of the signal to be sensed, isolation of the power stage from the control stage, [INAUDIBLE] voltage and link capability, and cost, sense resistor and current transformer based measurements highlighted in red were selected for implementation in this TI design. Their implementation, along with the associated signal conditioning, is discussed in the next slides.
Shown on the left portion of the slide is isolated current sensing using AMC1302. In order to measure the input and output currents of the converter, we use a shunt resistor. This current is a DC as it is measured after the output capacitor but before the battery and at the input and the output elements. The sensor resistor is designed to provide a voltage drop of plus or minus 15 millivolts, accounting for bidirectional operation of the converter.
The signal conditioning state starts with feeding the sense resistor voltage to the input of AMC1302. This provides isolation between the power state and the control circuitry. The AMC1302 has a fixed gain of 41 and provides a bandwidth of 280 kilohertz, which is sufficient for measuring DC currents. The analog output voltage of this stage is scaled to map the full scale range of the ADC which is 0 to 3.3 volts using OPA320 op amp.
Shown in the middle is current sensing using AMC1306. In order to measure the switching currents of the converter, we use a shunt resistor as described before but along with AMC1306. The switching current is pulsating high frequency AC current. And it is measured before the output capacitor terminals. The sense resistor, as before, is designed to provide a voltage drop of plus or minus 50 millivolt, accounting for bidirectional operation.
The signal conditioning state starts with feeding the sense resistor voltage to the input of AMC1306. The AMC1306 prevents isolation between the power stage and control circuitry, and also with the bandwidth of 800 kilohertz, it outputs a bit stream of data which can be directly interfaced with the sigma-delta module of C2000 where post-processing of the signal is done.
Shown on the right is current measurement using current transformer. In order to measure the time currents, the current transformer is generally used. It is directly connected across the transformer tank and provides isolation from line voltages. This also helps in lossless measurement of AC currents by offering very high bandwidth measurement.
The high current across the primary is stepped down with the current transformer turns ratio. A burden resistor is connected across the secondary, which translates this current into a voltage value. This signal is connected to OPA320 for signal conditioning. After which, it is sent to ADC inside the microcontroller for post-processing.
Now we will talk about the silicon carbide MOSFET selection for the power states. The red block represents the switches on the primary side. And the green block represents the switches on the secondary side. As the primary side switches are needed to block 800 volt DC, which is the maximum input voltage, three silicon carbide MOSFETs having a drain source blocking voltage of 1,200 volt was chosen, giving it a derating factor of around 1.5.
Also, this MOSFET has a drain source resistance of 16 milliohm which significantly reduces the conduction losses at high currents. Similar to the primary, the secondary side switches were chosen to block 500 volt DC, which is the maximum output DC voltage. So three silicon carbide MOSFETs having a drain source blocking voltage of 900 volts was chosen.
The secondary side switches also have very low on state resistance of 30 milliohm providing reduced conduction losses at high currents. Both the primary and secondary switches are TO-247 four pin packages having a power source and a Kelvin source. The Kelvin pin aids in the fast removal of charges during turn on and turn off, thereby helping in better switching performance.
Next we will discuss about the auxiliary power grid for powering the gate driver and sensing circuits. Typically in charging stations, we have a direct AC to DC conversion using fiber converters which provide the required DC voltage for powering the auxiliary circuits.
As the design of this converter is out of scope for this TI design implementation, we have used a lab DC power supply to power the auxiliary circuits. The main power tree, shown on the left, consists of a lab dispenser plate which provides an input of 12 to 17 volts.
The TPS82130 converts this input subplate into a regulated 5 volt subplate. This 5 volt line is used for powering the gate level cards, primary and secondary voltage, and current sensing circuits. The TLV7133 and the REF20033 ACs are used to obtain 3.3 volt and 1.65 volt regulated output voltages from 5 volt line and 3.3 volt line respectively.
Shown on the middle is the gate drive bias power tree. This uses the 5 volt line from the main power tree to power an SN6505 AC, UCC21530 gate driver AC, and an ISO7721 isolated inside the gate driver card. The SN6501 in turn drains the push/pull transformer to generate plus 15 volt to minus 4 volt bias voltages required to drive the power stage of the gate driver. The plus 15 volt is converted into 5 volt for powering the auxiliary circuits performing short circuit detection and two-level turn off which was previously discussed in the slide wherein we spoke about the silicon carbide gate driver.
Shown on the right is the sensing circuit's power tree. The same 5 volt line from the main power board also powers an SN6505 AC which drives a push/pull transformer for generating isolated 5 volt supply which is used at the input of AMC1311, AMC1302, and AMC1306. The 3.3 volt line from the main power tree is used for powering the controller side of AMC1311, AMC1302, and AMC1306.
Now we will go through the different amounts of control loop implementation for the single phase dual active bridge. Each method has its pros and cons. First is the single phase shift where cross connected switches import the bridges are switched with a constant phase difference between them as shown in the figure. Controlling the phase enables control of both the magnitude and direction of power flow.
Single phase control scheme can be easily implemented and can really solve switching over a small range. It also has small inertia and fast dynamic response. This control scheme ensures soft switching and provides best performance at all operating points only when the primary voltage and the reflected secondary voltages are nearly equal. When the conversion ratio is high, we obtain high peak [INAUDIBLE] current which circulate through the transformer.
Next is the extended phase shift scheme. And as the name suggests, it is an extension of the single phase shift where an additional inner phase shift is introduced between the legs of the same bridge. Shown in the figure is the additional inner phase shift between the legs of the primary. This scheme improves the efficiency of the converter compared to the single phase shift by expanding the ZVS range over wide operating points.
It also has the advantage of providing two degrees of freedom where the outer phase is used to control the magnitude and direction of the power and the inner phase shift improves the range of the ZVS. But this scheme suffers from the problem that when the direction of power flow changes, the operating state of the two bridges just needs to be exchanged. Even though this method provides improved ZVS range compared to the single phase shift scheme, there are better modulation schemes which can improve the ZVS even further.
Next is the dual phase shift modulation where the cross connected parts of both the bridges are switched with an equal inner phase shift in addition to an outer phase shift between the two bridges. The transformer primary and secondary voltages, as can be seen from the figure, are three levels quasi-square voltages. It has all the advantages of the schemes mentioned before.
And in addition to them, this scheme reduces the circulating currents in the transformer and further improves the ZVS range. Also due to symmetrical control of both bridges, it is the best scheme which can be employed in bidirectional converters. The only drawback of this scheme is its complex implementation compared to single phase shift and extended phase shift schemes.
Finally, the triple phase shift scheme is the same as dual phase shift modulation. But the inner phase shift of both the bridges can be adjusted separately. As shown in the figure, the zero interval can be adjusted to different times in the primary and the secondary. Theoretically, this converter can achieve zero voltage switching up to zero load condition.
This offers the best reduction in circulating currents across the transformer. And also, the transformer size can be significantly reduced. The only drawback is that it requires very complex implementation from the PWM perspective. Considering the pros and cons and the implementation difficulties of all the methods, the single phase shift dual active bridge was chosen as the TI design implementation for this particular reference design.
Now let's go over some of the important features of a digital controller. When choosing a digital power controller for your system, it is important to evaluate four main features. The ADC must be able to sample fast enough to stabilize the control group and should be tightly coupled with the CPU and PWMs for fast control loop response.
Second, the CPU must be high performance enough to compute the necessary controller functions as well as receive input from the ADC and output the control loop behavior to the PWMs within a single control loop cycle. The PWMs must also be flexible enough to allow for complex topologies and precise synchronization in order to efficiently and effectively control the FETs and the power states.
There must be an on-chip comparator that is able to trip the PWM outputs for precise control and monitoring of the power states. Shown on the right are the features of F280049x control card. The Piccolo F28004x is a powerful 32 bit floating point microcontroller unit with 100 megahertz clock that is optimized for processing, sensing, and actuation to improve close loop performance.
The controller [INAUDIBLE] allows significant offloading of common tasks from the main CPU. The CLA is an independent 32 bit floating point math accelerator that executes in parallel with the CPU, which aids in parallel processing of ISRs. High performance analog blocks are integrated on F28004x microcontroller unit to further enable system consolidation.
Three separate 12-bit ADCs provide precise and efficient management of multiple analog signals which ultimately boost system throughput. Seven programmable gain amplifiers on the analog front end enable on-chip voltage scaling before conversion. Seven analog comparator modules provide continuous monitoring of input voltage levels for [INAUDIBLE] conditions.
It also contains industry leading control peripherals with frequency independent EPWM, high resolution PWM, and eCAP modules to allow best in class level of control to the system. The built in four channel sigma delta filter module allows for seamless integration of a [INAUDIBLE] sigma delta modulator across an isolation barrier.
On the bottom right are the tools which are for the digital power design. The Code Composer Studio is used as an integrated development environment framework. It can be easily integrated with other useful tools like Digital Power SDK, Power Suite, and the Suite which aid in the close loop software development for the dual active bridge converter design.
Now let's walk through the high level control loop block diagram for the closed loop implementation of dual active bridge. The output voltage of the converter is scaled and then fed into the ADCFC2000. It is denoted by [INAUDIBLE] feedback.
This output voltage is then compared with the reference voltage denoted by B reference in the figure. The error between the reference voltage and the measured voltage is fed to a compensator which is typically a PAD controller.
The output of this PAD controller drives the reference [? commander ?] to the inner current loop. The compensator of the inner current loop, denoted with [? DA, ?] compares this reference with the actual value of the sensed current and uses this error to adjust the phase of the PWM waveform to the leading bridge switches or the lagging bridge switches depending upon the direction of current in the converter.
In this slide, we will look at the actual voltage mode implementation of the control loops inside a C2000 microcontroller. It consists of three interrupt service routines which contain functions for performing each task. These are the interrupt service routine one, interrupt service routine two, and the interrupt service routine three. Each interrupt service routine is triggered by a different interrupt.
ISR1 is triggered by PWM interrupt. ISR2 is triggered by an ADC interrupt. And ISR3 is triggered by CPU timer zero interrupt. ISR1 is reserved for PWM update. And the function shown in blue does the calculation for updating the PWM in the ISR. ISR2 runs at PWM frequency.
It mainly reads the ADC signals and then it contains the compensated [? JV, ?] which does the control action. And finally, it consists of a function for calculating the PWM phase shift which needs to be applied to the switches. ISR3 is used for performance on housekeeping instrumentation functions, like doing an average on the voltage and the current signals, keeping track of them, and also calculating the dead time which needs to be uploaded to do switches.
Now we will go through some high level system specifications and then calculate the RMS and average values of current flowing through the switch on the diode. System input voltage is 800 volt or put on ranges between 400 to 500 volts. Operating switching frequency is at 100 kilohertz.
The calculations are done for an optimal value of phase which is less than the value at which maximum power transfer is obtained. All calculations were done in MatCab. A list of references which were used for doing calculations is mentioned in the appendix slide.
Initially we set the value of phase shift as shown in this block, and then calculate the required leakage inductance for a power transfer of 10 kilowatt. Next, we calculate the peak values of inductor current waveform. The variable Tp, shown here, is the instant of zero [INAUDIBLE] of the current waveform. And it is used for calculating the instant at which the MOSFET and the diode are on in one switching cycle.
On the right of the slide are the equations shown for calculating the switch and the diode RMS current as well as the switch and the diode average currents. Later, these values will be used for calculating the losses across the switches.
Now let's look at the switching and the conduction loss calculations for the silicon carbide MOSFETs and its body diode. The conduction losses are calculated using the squared RMS value of switch current multiplied by the drain source resistance. The body diode losses are calculated using the average value of their current multiplied by the former voltage drop of the diode averaged over a switching period.
The calculations are shown for the singular sets of the primary and the secondary on the top left on the slide. It is then multiplied by 4 in order to obtain the total conduction losses. As we can see, the total conduction losses across the primary and the secondary switches comes somewhere around 77 volts.
Shown on the right are the switching loss curves with E-on, E-off values from the manufacturer data sheet. E-on and E-off are the turn on and the turn off loss coefficients. The two curves represent the primary side FET and for the secondary side FET.
The switching loss coefficients are picked for a particular value of current and scale with respect to voltage [INAUDIBLE], and multiplied by the switching frequency in order to obtain the switching loss over one switching cycle. It is then multiplied by 4 in order to obtain the total switching loss across the primary and the secondary. [INAUDIBLE] amounts to somewhere around 32 watts.
In a dual active bridge, we need to take into account the losses produced due to the non-zero voltage switching turn on across some of the switches of the primary. These hard switching losses are calculated similar to the turn off losses before. But E-on coefficients are taken from the manufacturer's data sheet instead of E-off and similar procedure is repeated. The total system loss numbers are summarized in an upcoming slide where we will go through each and every component of the loss and calculate the efficiency numbers as well.
Now let's go through the design equations of the transformer. The transformer design process is an entire topic of its own. We'll cover the detailed design analysis in a later training. So in this slide, we only list some of the most important design considerations.
In step 1, we calculate the volt-seconds applied to the winding of the transformer. This is then used to calculate the apparent power of the transformer. In step 2, we calculate the current density with the required wire cross section. The above values of current density and the apparent power are used in the calculation of area product in step 3. Ap refers to the area product.
In this step, the maximum flux density is assumed around 0.2 tesla and Ku is the transformer utilization factor which is topology dependent. From the manufacturer's data sheet, a core is selected whose area is higher than the calculated area product value.
Once the core is selected, we know the area of cross-section of the core. And we can calculate the required primary and secondary turns using the formula illustrated in step 5. Shown on the right is a table illustrating the actual terms, power rating, RMS current, estimated losses of the transformer which has been used in this TI design.
Now let's summarize the loss numbers calculated from the previous slides. Shown on the table on the right, we have listed the various losses for the dual active bridge DC/DC converter-- the silicon carbide MOSFET and diode conduction losses for the primary and the secondary the switching losses for the SiC MOSFETs on the primary and the secondary, and the silicon carbide MOSFET turn on losses for the non-ZVS transitions on the primary, and the transformer core and the copper losses. In addition to the losses above mentioned, we are included other losses like the capacitor [? DSR ?] losses, gate driver losses, and the inductor losses.
The calculated peak efficiency comes on right around 97%. In practice, the efficiency numbers are expected to vary somewhere between 88% for values in very light load to 98% where peak efficiency is [INAUDIBLE]. We will see how the efficiency varies as the load on the converter is changed in the upcoming slide.
Now let's see how the efficiency of the converter varies as it is loaded. The graph on the right shows the measured efficiency versus the load power. The y-axis represents the efficiency in percentage. And the x-axis represents the load power in volts.
We can see that at light loads, when the converter is loaded very lightly, we have efficiency [INAUDIBLE] 88%. And as the converter is loaded and it is increased, we see that it gains peak efficiency of 98% at around 6 kilowatt. And the full load efficiency of around 95% is obtained at 10 kilowatt. Note that these efficiency numbers are from initial testing results. The numbers are expected to go higher during the final release of this TI design.
In this slide, we summarize the testing results of the dual active bridge converter. The single phase dual active bridge converter is designed for a maximum power level of 10 kilowatt. It can be operated at a PWM switching frequency between 100 to 200 kilohertz, although the results, which have been populated, are based on its operation at 100 kilohertz. It obtains a peak efficiency of 90% at 6 kilowatt load. The efficiency at full load of 10 kilowatt is 94.8%. The power density of the converter is 2.25 kilowatt per liter or 37 watts per inch cubed.
I hope that this training material and content was of interest to you. Thank you.