最佳化針腳配置與針腳位置，降低電源供應器設計中的 EMI

Name: Optimizing pinout and pin placement to mitigate EMI in your power supply design
Uploaded: 2021-03-03T19:18:41.104Z
Description: This brief video covers how package features, pinout, and pin placement can be used to mitigate EMI in your designs.

00:03:50 | 17 APR 2025

封裝功能、針腳配置及針腳位置對於降低 EMI 都扮演著關鍵角色。了解每個項目的微調會如何影響電源供應器的 EMI 性能，包括實際舉例說明對稱配置如何改善 CISPR 25 Class 5 高低頻率的測試結果。