SNAS308G April   2005  – May 2016 ADC081S021

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Determining Throughput
    4. 8.4 Device Functional Modes
      1. 8.4.1 Transfer Function
      2. 8.4.2 Modes of Operation
        1. 8.4.2.1 Normal Mode
        2. 8.4.2.2 Shutdown Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Analog Inputs
      2. 9.1.2 Digital Inputs and Outputs
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Noise Considerations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

DBV Package
6-Pin SOT-23
Top View
NGF Package
6-Pin WSON
Top View

Pin Functions

PIN TYPE(1) DESCRIPTION
NO. NAME
1 VA P Positive supply pin. This pin must be connected to a quiet 2.7-V to 5.25-V source and bypassed to GND with a 1-µF capacitor and a 0.1-µF monolithic capacitor placed within 1 cm of the power pin.
2 GND G The ground return for the supply and signals.
3 VIN I Analog input. This signal can range from 0 V to VA.
4 SCLK I Digital clock input. This clock directly controls the conversion and readout processes.
5 SDATA O Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin.
6 CS I Chip select. On the falling edge of CS, a conversion process begins.
(1) G = Ground, I = Input, O = Output, P = Power