SLOS912D February   2015  – July 2015 ALM2402-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Thermal Information
    3. 7.3 ESD Ratings
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Electrical Characteristics
    6. 7.6 AC Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 OTF/SH_DN
      2. 8.3.2 Supply Voltage
      3. 8.3.3 Current Limit and Short Circuit Protection
      4. 8.3.4 Input Common Mode Range and Overvoltage Clamps
      5. 8.3.5 Thermal Shutdown
      6. 8.3.6 Output Stage
      7. 8.3.7 EMI Susceptibility and Input Filtering
    4. 8.4 Device Functional Modes
      1. 8.4.1 Open Loop and Closed Loop
      2. 8.4.2 Shutdown
  9. 9 Applications and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Capacitive Load and Stability
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Resolver Excitation Input (Opamp Output)
          1. 9.2.2.1.1 Excitation Voltage
          2. 9.2.2.1.2 Excitation Frequency
          3. 9.2.2.1.3 Excitation Impedance
        2. 9.2.2.2 Resolver Output
        3. 9.2.2.3 Power Dissipation and Thermal Reliability
          1. 9.2.2.3.1 Improving Package Thermal Performance
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

For best operational performance of the device, use good PCB layout practices, including:

  • Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry.
    • Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single supply applications.
  • Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. For more detailed information, refer to Circuit Board Layout Techniques, (SLOA089).
  • To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace.
  • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit.

11.2 Layout Example

This layout does not verify optimum thermal impedance performance. Refer to TI’s design support web page at www.ti.com/thermal for a general guidance on improving device thermal performance.

ALM2402-Q1 layout_slos912.gifFigure 35. ALM2402Q1 Layout Example