SBAS475A June   2009  – January 2023 AMC6821-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Feature Description
      1. 8.2.1 ADC Converter
      2. 8.2.2 Temperature Sensor
        1. 8.2.2.1 Series Resistance Cancellation
        2. 8.2.2.2 Reading Temperature Data
        3. 8.2.2.3 Temperature Out-of-Range Detection
        4. 8.2.2.4 Remote Temperature Sensor Failure Detection
      3. 8.2.3 PWM Output
      4. 8.2.4 PWM Waveform Setting
      5. 8.2.5 Fan Speed Measurement
        1. 8.2.5.1 Tach-Data Register
          1. 8.2.5.1.1 Reading the Tach Data Register
          2. 8.2.5.1.2 RPM Measurement Rate
          3. 8.2.5.1.3 Select Number of Pulses/Revolution
          4. 8.2.5.1.4 Tach Mode Selection
          5. 8.2.5.1.5 Fan RPM Out-of-Range Detection
      6. 8.2.6 Fan Failure Detection
      7. 8.2.7 FAN-FAULT Pin
      8. 8.2.8 Fan Control
        1. 8.2.8.1 THERM Pin and External Hardware Control
          1. 8.2.8.1.1 THERM Pin as an Output
          2. 8.2.8.1.2 THERM Pin as an Input
        2. 8.2.8.2 Fan Spin-Up
        3. 8.2.8.3 Normal Fan Speed Control
          1. 8.2.8.3.1 Software DCY Control Mode
          2. 8.2.8.3.2 Software-RPM Control Mode (Fan Speed Regulator)
          3. 8.2.8.3.3 Auto Temperature Fan Mode
      9. 8.2.9 Interrupt
        1. 8.2.9.1 OVR Pin
        2. 8.2.9.2 SMBALERT Pin
        3. 8.2.9.3 SMBALERT Interrupt Behavior
        4. 8.2.9.4 Handling SMBALERT Interrupts
    3. 8.3 Device Functional Modes
    4. 8.4 Programming
      1. 8.4.1 SMBus Interface
        1. 8.4.1.1 Communication Protocols
      2. 8.4.2 SMBus Alert Response Address (ARA)
      3. 8.4.3 Power-On Reset and Start Operation
    5. 8.5 Register Map
      1. 8.5.1 Register Description
        1. 8.5.1.1 Device Configuration Registers
        2. 8.5.1.2 Device Status Registers
        3. 8.5.1.3 Fan Controller Registers
        4. 8.5.1.4 Temperature Data Registers
        5. 8.5.1.5 Temperature Limit Registers
          1. 8.5.1.5.1 Tach-Data Register
          2. 8.5.1.5.2 Tach Setting Register
          3. 8.5.1.5.3 Tach Low Limit Register
          4. 8.5.1.5.4 Tach High Limit Register
  9. 9 Application and Implementation
    1. 9.1 Power Supply Recommendations
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.5.1.2 Device Status Registers

Reading the status registers clears the appropriate status bit. Status register bits are sticky (except the RTF bit). Whenever a status bit is set, indicating an out-of-limit condition, it remains set until the event that caused it is resolved and the status register is read. The status bit can only be cleared by reading the status register after the event is resolved. All bits are cleared when reading the register, and all bits are reasserted if the out-of limit condition still exists on the next monitoring cycle, unless otherwise noted.

Table 8-19 Status Register 1 (Address 0x02, Value After Power-On or Reset = 0x00)
BITNAMER/WDEFAULTDESCRIPTION
7LTLR0LTL = 1 when the local temperature is less than or equal to the value of the Local-Low-Temp-Limit register. Otherwise, LTL = 0. If the local temperature is still outside the local temperature low limit, this bit reasserts on the next monitoring cycle.
6LTHR0LTH = 1 when the local temperature is greater than or equal to the value of the Local-High-Temp-Limit register. Otherwise, LTH = 0. If the local temperature is still outside the local temperature high limit, this bit reasserts on the next monitoring cycle.
5RTFR0Remote sensor-failure interrupt. RTF = 1 when the remote temperature sensor fails (short- or open-circuit). RTF = 0 when the remote sensor is in normal condition. When RTF = 1, the OVR pin is asserted and the remote temperature data register is set to –128°C.
RTF = 1 also generates an interrupt through the SMBALERT pin if an interrupt is enabled (RTFIE = 1). Once RTF is set ('1'), it always remains ('1') until power-on reset or software reset occurs, whether or not the failure condition continues. Reading the status register does not clear the RTF bit.
4R-THERMR0Remote temperature over the remote THERM limit flag. R-THERM = 1 when the temperature is greater than the value of the Remote-THERM-Limit register. Otherwise, R-THERM = 0. When R-THERM = 1, the THERM pin goes low. It also generates a THERM interrupt if THERMOVIE = 1. This bit is cleared on a read of Status Register 1. Once cleared, this bit is not reasserted until the remote temperature falls 5°C below this THERM limit, even if the THERM condition persists. Refer to the THERM Pin and External Hardware Control section.
3RTLR0RTL = 1 when the remote temperature is less than or equal to the value of the Remote-Low-Temp-Limit register. Otherwise, RTL = 0. If the remote temperature is still beyond the remote temperature low limit, this bit reasserts on the next monitoring cycle.
2RTHR0RTH = 1 when the remote temperature is greater than or equal to the value of Remote-High-Temp-Limit register. Otherwise, RTH = 0. If the remote temperature is still beyond the remote temperature high limit, this bit reasserts on the next monitoring cycle.
1FANSR0Fan-slow flag. FANS = 1 if the TACH data are greater than or equal to the value of the TACH-Low-Limit register. This bit indicates if the fan becomes stuck or goes under the minimum speed. FANS = 0 if the TACH data are smaller than the TACH low limit. This bit is cleared ('0') only after reading this register, and reasserts '1' in the next monitoring if a fan-slow is detected. After spin-up, FANS is set ('1') even if the TACH data are less than the TACH low limit until the register is read. FANS = 1 generates a fan out-of-range interrupt through the SMBALERT pin if fan out-of-range is enabled (FANIE = 1). Five consecutive fan-slow events result in a FAN FAILURE status; which asserts the FAN-FAULT pin low. See the FAN-FAULT PIN section for details. Note that a FANS (fan-slow) detection is not performed during spin-up.
0RPM-ALARMR0RPM-ALARM = 1 when the TACH data are less than or equal to the value of the TACH-High-Limit register. This means the RPM is over the maximum limit defined by the TACH high limit. Otherwise, RPM-ALARM = 0. This bit is cleared when reading this register. Once cleared, this bit is not reasserted on the next monitoring cycle even if the condition still persists. This bit may be reasserted only if the RPM drops below the allowed maximum speed. RPM-ALARM = 1 generates a fan out-of-range interrupt through the SMBALERT pin if fan out-of-range is enabled (FANIE = 1), but does not cause an interrupt through the FAN-FAULT pin.
Table 8-20 Status Register 2 (Address 0x03, Value After Power-On or Reset = 0x00)
BITNAMER/WDEFAULTDESCRIPTION
7THERM-INR0Status of the THERM pin as an input. When this input is pulled low, THERM-IN = 1, and the fan is driven at full speed. This bit is cleared when reading this register and be written to '1' if the pin persists "pulled-low".
6L-THERMR0Local temperature over the local THERM limit flag. L-THERM = 1 when the local temperature is greater than the value of the Local-THERM-Limit register. Otherwise, L-THERM = 0. When L-THERM is set to 1, the THERM pin goes low. It also generates a THERM interrupt through the SMBALERT pin, if enabled (THERMOVIE = 1). This bit is cleared on a read of Status Register 1. Once cleared, this bit is not reasserted until the temperature falls 5°C below the THERM limit, even if the THERM condition persists. Refer to the THERM Pin and External Hardware Control section.
5LPSVR0Active control temperature below the PSV (passive cooling) temperature flag. This bit is set to '1' when the active control temperature is equal to or below the PSV temperature. Otherwise, this bit is cleared ('0'). LPSV = 1 generates a PSV interrupt on SMBALERT, if enabled (PSVIE = 1). This bit is cleared when reading this register. If the active control temperature remains equal to or below the PSV temperature, this bit reasserts on the next monitoring cycle.
4LTCR0Local temperature over the local critical temperature flag. This bit is set ('1') when the local temperature is equal to or above the local critical temperature. LTC = 0 if the local critical temperature is below this value. LTC = 1 asserts the OVR pin low and generates an LTC interrupt (non-maskable) though the SMBALERT pin. This bit is cleared when reading this register. If the over-critical limit condition persists, this bit reasserts on the next monitoring cycle.
3RTCR0Remote temperature over the remote critical temperature flag. This bit is set to '1' when the remote temperature is equal to or above the remote critical temperature. RTC = 0 if the remote critical temperature is below this value. RTC = 1 asserts the OVR pin low and generates an RTC interrupt (non-maskable) though the SMBALERT pin. This bit is cleared when reading this register. If the over-critical limit condition persists, this bit reasserts on next monitoring cycle.
2ReservedR0Reserved. Reading returns '0'.
1ReservedR0Reserved. Reading returns '0'.
0ReservedR0Reserved. Reading returns '0'.