SLUSB96A November   2012  – December 2015

 

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Fundamentals
      2. 7.1.2 Wireless Power Consortium (WPC)
      3. 7.1.3 Power Transfer
      4. 7.1.4 Communication
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Capacitor Selection
      2. 7.3.2  A6 Coil Specification
      3. 7.3.3  Option Select Pins
      4. 7.3.4  LED Modes
      5. 7.3.5  Parasitic Metal Object Detect (PMOD) and Foreign Object Detection (FOD)
      6. 7.3.6  Shut Down by Thermal Sensor or Trigger
      7. 7.3.7  Fault Handling and Indication
      8. 7.3.8  Power Transfer Start Signal
      9. 7.3.9  Power-On Reset
      10. 7.3.10 External Reset, RESET Pin
      11. 7.3.11 Trickle Charge and CS100
      12. 7.3.12 Current Monitoring Requirements
      13. 7.3.13 Overcurrent Protection
      14. 7.3.14 MSP430G2101 Low Power Supervisor
      15. 7.3.15 All Unused Pins
  8. 8 Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Detailed Design Procedure
        1. 8.1.1.1 Input Regulator
        2. 8.1.1.2 Power Trains
        3. 8.1.1.3 Signal Processing Components
        4. 8.1.1.4 Low-Power Supervisor
        5. 8.1.1.5 Disabling Low-Power Supervisor Mode
        6. 8.1.1.6 Input Power Requirements
    2. 8.2 System Examples
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Community Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Voltage applied at V33D to DGND –0.3 3.6 V
Voltage applied at V33A to AGND –0.3 3.6
Voltage applied to any pin (2) –0.3 3.6
Storage temperature, TSTG –40 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages referenced to GND.

6.2 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V Supply voltage during operation, V33D, V33A 3.0 3.3 3.6 V
TA Operating free-air temperature range –40 110 °C
TJ Junction temperature 110

6.3 Thermal Information

THERMAL METRIC(1) bq500410A UNIT
RGZ [VQFN]
48 PINS
RθJA Junction-to-ambient thermal resistance 27.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 12.9 °C/W
RθJB Junction-to-board thermal resistance 4.3 °C/W
ψJT Junction-to-top characterization parameter 0.2 °C/W
ψJB Junction-to-board characterization parameter 4.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 0.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor IC Package Thermal Metrics application report, SPRA953.

6.4 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
IV33A Supply current V33A = 3.3 V 8 15 mA
IV33D V33D = 3.3 V 42 55
ITotal V33D = V33A = 3.3 V 52 60
INTERNAL REGULATOR CONTROLLER INPUTS/OUTPUTS
V33 3.3-V linear regulator Emitter of NPN transistor 3.25 3.3 3.6 V
V33FB 3.3-V linear regulator feedback 4 4.6
IV33FB Series pass base drive VIN = 12 V; current into V33FB pin 10 mA
Beta Series NPN pass device 40
EXTERNALLY SUPPLIED 3.3 V POWER
V33D Digital 3.3-V power TA = 25°C 3 3.6 V
V33A Analog 3.3-V power TA = 25°C 3 3.6
V33Slew 3.3-V slew rate 3.3-V slew rate between 2.3 V and 2.9 V,
V33A = V33D		 0.25 V/ms
DIGITAL DEMODULATION INPUTS: COMM_A+, COMM_A-, COMM_B+, COMM_B-
VCM Common mode voltage each pin –0.15 1.631 V
COMM+, COMM- Modulation voltage digital resolution 1 mV
REA Input Impedance Ground reference 0.5 1.5 3 MΩ
IOFFSET Input offset current 1-kΩ source impedance –5 5 µA
ANALOG INPUTS: V_IN, V_SENSE, I_SENSE, T_SENSE, LED_MODE, LOSS_THR
VADC_OPEN Voltage indicating open pin LED_MODE, LOSS_THR open 2.37 V
VADC_SHORT Voltage indicating pin shorted to GND LED_MODE, LOSS_THR shorted to ground 0.36
VADC_RANGE Measurement range for voltage monitoring ALL ANALOG INPUTS 0 2.5
INL ADC integral nonlinearity –2.5 2.5 mV
Ilkg Input leakage current 3 V applied to pin 100 nA
RIN Input impedance Ground reference 8 MΩ
CIN Input capacitance 10 pF
DIGITAL INPUTS/OUTPUTS
VOL Low-level output voltage IOL = 6 mA , V33D = 3 V DGND1 + 0.25 V
VOH High-level output voltage IOH = –6 mA , V33D = 3 V V33D
– 0.6 V
VIH High-level input voltage V33D = 3 V 2.1 3.6
VIL Low-level input voltage V33D = 3.5 V 1.4
IOH(MAX) Output high source current 4 mA
IOL(MAX) Output low sink current 4
SYSTEM PERFORMANCE
VRESET Voltage where device comes out of reset V33D Pin 2.3 2.4 V
tRESET Pulse width needed for reset RESET pin 2 µs
fSW Switching Frequency 112 205 kHz
tdetect Time to detect presence of device requesting power 0.5 s